IP Library Granted Patent US 10,566,465
Granted Patent B2
US 10,566,465 · App. 15/992,515 · Granted Feb 18, 2020

Semiconductor device comprising Schottky barrier diodes

Inventors: Yon Sup Pang (Cheonan-si, KR); Hyun Kwang Shin (Cheongju-si, KR); Tae Hoon Lee (Sejong-si, KR)
Assignee: MagnaChip Semiconductor, Ltd.
H01L29/872H01L21/76H01L21/76224H01L27/0727H01L29/0619H01L29/0649H01L29/1079H01L29/36H01L29/402
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,566,465
App. No.
15/992,515
Granted
Feb 18, 2020
Kind
B2
Abstract

A semiconductor device includes a first N-type deep well region and a second N-type deep well region formed in a substrate, an N-type diffused well region formed between the first N-type deep well region and the second N-type deep well region, wherein a concentration of the N-type diffused well region is less than a concentration of the first N-type deep well region or the second N-type deep well region, a first P-type well region formed in the first N-type deep well region, a second P-type well region formed in the N-type diffused well region, an insulating film formed to be in contact with the first P-type well region, and a silicide formed on the N-type diffused well region, such that a Schottky barrier diode is formed between the silicide and the N-type diffused well.

Claims (56)

1. A semiconductor device comprising:

a first N-type deep well region and a second N-type deep well region formed in a substrate;

an N-type diffused well region formed between the first N-type deep well region and the second N-type deep well region, wherein a dopant concentration of the N-type diffused well region is lower than a dopant concentration of the first N-type deep well region or the second N-type deep well region;

a first P-type well region formed in the first N-type deep well region;

a second P-type well region formed in the N-type diffused well region and having a depth equal to a depth of the first P-type well region;

an insulating film formed to be in contact with the first P-type well region; and

a silicide formed on the N-type diffused well region, such that a Schottky barrier diode is formed between the silicide and the N-type diffused well region.

2. The semiconductor device of claim 1 , further comprising:

a P+ doped first region formed in the first P-type well region; and

a P+ doped second region formed in the second P-type well region.

3. The semiconductor device of claim 1 , further comprising:

a third P-type well region formed in the second N-type deep well region and having a depth equal to the respective depth of the first P-type well region and the second P-type well region; and

an N-type buried layer formed below the N-type diffused well region, and wherein a dopant concentration of the N-type buried layer is greater than the dopant concentration of the N-type diffused well region,

wherein the second P-type well region is formed between the first P-type well region and the third P-type well region.

4. The semiconductor device of claim 3 , wherein the silicide is further formed to be in contact with the first P-type well region, the second P-type well region and the third P-type well region.

5. The semiconductor device of claim 1 , further comprising:

an N-type well region formed in the first N-type deep well region;

a cathode connected to the N-type well region;

a poly field plate formed on the insulating film; and

an anode connected to the poly field plate and the silicide.

6. A semiconductor device comprising:

an N-type deep well region and an N-type diffused well region contacting the N-type deep well region formed in a substrate, wherein a dopant concentration of the N-type diffused well region is lower than a dopant concentration of the N-type deep well region;

a first P-type well region formed in the N-type deep well region;

a second P-type well region formed in the N-type diffused well region and having a depth equal to a depth of the first P-type well region;

an insulating film formed to be in contact with the first P-type well region; and

a silicide formed to be in contact with the N-type diffused well region, such that a Schottky barrier diode is formed between the silicide and the N-type diffused well region.

7. The semiconductor device of claim 6 , further comprising:

a third P-type well region formed in another N-type deep well region and having a depth equal to the respective depth of the first P-type well region and the second P-type well region; and

an N-type buried layer formed below the N-type deep well region,

wherein the second P-type well region is formed between the first P-type well region and the third P-type well region.

8. The semiconductor device of claim 7 ,

wherein a dopant concentration of the N-type buried layer is greater than the dopant concentration of the N-type diffused well region.

9. The semiconductor device of claim 6 , further comprising:

an N-type well region formed in the N-type deep well region and separated from the first P-type well region by the insulating film;

a poly field plate formed on the insulating film;

a cathode connected to the N-type well region; and

an anode connected to the poly field plate and the silicide.

10. The semiconductor device of claim 7 , wherein the silicide is further formed to be in contact with the first P-type well region, the second P-type well region, and the third P-type well region.

11. A semiconductor device comprising:

a first N-type deep well region and a second N-type deep well region formed in a substrate;

an N-type diffused well region formed between the first N-type deep well region and the second N-type deep well region;

a first P-type well region formed in the first N-type deep well region;

a second P-type well region formed in the N-type diffused well region and having a depth equal to a depth of the first P-type well region;

a third P-type well region formed in the second N-type deep well region and having a depth equal to the respective depth of the first P-type well region and the second P-type well region;

a first insulating film formed to be in contact with the first P-type well region; and

a silicide formed on the N-type diffused well region, such that a Schottky barrier diode is formed between the silicide and the N-type diffused well region,

wherein the second P-type well region is formed between the first P-type well region and the third P-type well region, and

wherein the silicide is further formed to be in contact with the first, second and third P-type well regions.

12. The semiconductor device of claim 11 , further comprising an N-type buried layer formed below the N-type diffused well region.

13. The semiconductor device of claim 12 , wherein a dopant concentration of the N-type buried layer is greater than a dopant concentration of the N-type diffused well region.

14. The semiconductor device of claim 11 , wherein the silicide is further formed to be in contact with the first and second N-type deep well regions.

15. The semiconductor device of claim 11 , further comprising a second insulating film formed to be in contact with the third P-type well region.

16. The semiconductor device of claim 15 , further comprising a first poly field plate and a second poly field plate respectively formed on the first insulating film and the second insulating film.

17. The semiconductor device of claim 12 , wherein the N-type buried layer is overlapped with the first P-type well region, the second P-type well region and the third P-type well region.

18. The semiconductor device of claim 11 , wherein the second P-type well region is spaced apart from the first P-type well region and the third P-type well region.

19. The semiconductor device of claim 11 , further comprising a first N-type well region and a second N-type well region respectively formed in the first N-type deep well region and the second N-type deep well region.

Assignments (3)
CHANGE OF NAME Recorded Mar 12, 2024
From: KEY FOUNDRY CO., LTD.
To: SK KEYFOUNDRY INC.
Reel/Frame 066794/0290 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2020
From: MAGNACHIP SEMICONDUCTOR, LTD.
To: KEY FOUNDRY CO., LTD.
Reel/Frame 053703/0227 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 30, 2018
From: PANG, YON SUP; SHIN, HYUN KWANG; LEE, TAE HOON
To: MAGNACHIP SEMICONDUCTOR, LTD.
Reel/Frame 045933/0753 →
Priority Claims (1)
KR 10-2017-0127852 · Sep 29, 2017 · national
Continuity (1)
Related Publication 20190103498A1 · Apr 4, 2019