IP Library Granted Patent US 10,152,304
Granted Patent B2
US 10,152,304 · App. 15/995,748 · Granted Dec 11, 2018

Apparatuses and methods for random number generation

Inventors: Patrick A. La Fratta (Boise, ID); Jesse F. Lovitt (Boise, ID); Glen E. Hush (Boise, ID); Timothy P. Finkbeiner (Boise, ID)
Assignee: Micron Technology, Inc.
G06F7/588G11C7/065G11C7/1006G11C11/4087G11C11/4091G11C11/4096
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Quick Facts
Patent No.
US 10,152,304
App. No.
15/995,748
Granted
Dec 11, 2018
Kind
B2
Abstract

The present disclosure includes apparatuses and methods for random number generation. An example method includes operating a sense amplifier of a memory device to perform sensing a first voltage on a first sense line coupled to the sense amplifier and sensing a second voltage on a complementary second sense line coupled to the sense amplifier. The example method further includes generating a random number by detecting a voltage differential between the first sense line and the complementary second sense line.

Claims (62)

1. An apparatus, comprising:

a memory device;

a sense amplifier on the memory device, the sense amplifier configured to:

sense a residual first voltage on a first sense line coupled to the sense amplifier; and

sense a residual second voltage on a complementary second sense line coupled to the sense amplifier; and

wherein a random number is generated by detection of a residual voltage differential between the first sense line and the complementary second sense line.

2. The apparatus of claim 1 , wherein the memory device is configured to perform an equilibration operation such that the residual first voltage on the first sense line and the residual second voltage on the complementary second sense line are both in an equilibration state.

3. The apparatus of claim 1 , wherein the memory device is configured to generate the random number from electronic noise in a first electrical conductor physically connected with the first sense line and a second electrical conductor physically connected with the complementary second sense line.

4. The apparatus of claim 1 , wherein the memory device is configured to generate a differential in the residual first voltage and the residual second voltage via detection of unequal residual voltages in the first sense line and the second sense line.

5. The apparatus of claim 1 , wherein the memory device is configured to:

perform an equilibration operation that results in the residual first and second voltages being unequal in the first sense line and the second sense line; and

wherein thermal noise enables the residual first and second voltages to be unequal in the first sense line and the second sense line.

6. The apparatus of claim 1 , wherein the memory device is configured to:

generate a random data unit from detection of the residual voltage differential between the first sense line and the complementary second sense line; and

generate the random number utilizing the random data unit.

7. An apparatus, comprising:

an array of memory cells;

a sense amplifier coupled to the array, the sense amplifier configured to:

determine a residual voltage differential on a first sense line and a complementary second sense line by the sense amplifier being selectably coupled to the first and the second complementary sense lines; and

enable determination of a random data unit based on the determined residual voltage differential.

8. The apparatus of claim 7 , wherein the apparatus is configured to move the random data unit from storage in the sense amplifier to storage by a pair of complementary memory cells in a row of the array.

9. The apparatus of claim 7 , wherein the apparatus is configured to:

access the random data unit; and

generate a random number based on the random data unit.

10. The apparatus of claim 7 , wherein the apparatus is configured to:

determine a residual voltage differential on each of respective pairs of complementary sense lines; and

generate a vector of data units with a length that corresponds to a number of pairs of complementary sense lines of the array.

11. The apparatus of claim 7 , wherein the apparatus further comprises:

a controller, wherein the controller is configured to:

divide a vector of data units that corresponds to a number of pairs of complementary sense lines into a plurality of vector elements; and

generate a plurality of random numbers from the plurality of vector elements; and

wherein each of the random numbers is a selected plurality of data units in the vector elements.

12. The apparatus of claim 7 , wherein the apparatus is configured to:

determine a first residual voltage differential at a first time by a first sense operation performed on the first sense line and the complementary second sense line to yield a first random data unit; and

determine a second residual voltage differential at a second time by a second sense operation performed on the first sense line and the complementary second sense line to yield a second random data unit; and

wherein the first random data unit is different from the second random data unit due to electronic noise that causes the residual voltage on the first sense line and the complementary second sense line to randomly vary with passage of time.

13. The apparatus of claim 7 , wherein the apparatus is configured to:

perform a sense operation on the first sense line and the complementary second sense line to determine a residual voltage differential in a range of 15-45 millivolts; and

perform a read operation on a memory cell coupled to the first sense line and the complementary second sense line to determine a voltage differential of a programmed data unit in a range of 50-100 millivolts; and

wherein a lowest millivolt value in the residual voltage differential range is greater than a highest millivolt value in a range of inherent offsets for memory cells and sense amplifiers of the array.

14. A system, comprising:

sensing circuitry coupled to an array of memory cells, the sensing circuitry including a sense amplifier coupled to a respective sense line and configured to perform random number generation operations; and

a random number component coupled to the array and sensing circuitry; and

wherein the random number component is configured to generate a random number from a residual voltage differential sensed by the sense amplifier between a first sense line and a complementary second sense line in the array.

15. The system of claim 14 , wherein:

the sensing circuitry further comprises equilibrate circuitry configured to equilibrate complementary programmed memory cells selectably coupled to the first sense line and the complementary second sense line; and

the random number component generates the random number from a residual voltage differential of the first sense line and the complementary second sense line.

16. The system of claim 14 , wherein the random number component is further configured to:

receive a request for performance of a random number generation operation; and

execute coded instructions to initiate the performance of the random number generation operation.

17. The system of claim 14 , wherein the system further comprises:

compensate circuitry coupled to the sense amplifier and the respective sense line; and

wherein the compensate circuitry is configured to compensate for an effect of an inherent offset in the sense amplifier or the respective sense line on the sensed differential of the residual voltage differential.

18. The system of claim 14 , wherein the system further comprises:

a controller selectably coupled to a row of a plurality of memory cells in the array and the sensing circuitry; and

wherein the controller is configured to direct generation of random numbers based on residual voltage differentials sensed by a plurality of sense amplifiers on a corresponding plurality of complementary sense lines.

19. The system of claim 14 , wherein the system further comprises:

a controller selectably coupled to a row of a plurality of complementary memory cells in the array and the sensing circuitry; and

wherein the controller is configured to generate a vector of data units with a length that corresponds to a number of the plurality of complementary memory cells in the row.

20. The system of claim 14 , wherein the system further comprises:

a controller selectably coupled to a row of a plurality of complementary memory cells in the array and the sensing circuitry; and

wherein the controller is configured to generate a vector of data units with a length that corresponds to a number of random data units generated from the residual voltage differentials sensed by a respective plurality of sense amplifiers.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 11, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050713/0001 →
SUPPLEMENT NO. 9 TO PATENT SECURITY AGREEMENT Recorded Aug 9, 2018
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 047282/0463 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 1, 2018
From: LA FRATTA, PATRICK A.; LOVITT, JESSE F.; HUSH, GLEN E.; FINKBEINER, TIMOTHY P.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 045963/0637 →
Continuity (2)
Continuation 15227459 · Aug 3, 2016
Related Publication 20180275964A1 · Sep 27, 2018