IP Library Granted Patent US 10,534,543
Granted Patent B2
US 10,534,543 · App. 15/996,287 · Granted Jan 14, 2020

Using counters to efficiently track busy time of storage systems

Inventors: Steven Gaskill (Campbell, CA); Kihoon Park (Cupertino, CA); Yin Feng Zhang (Shanghai, CN)
Assignee: MICRON TECHNOLOGY, INC.
G06F3/061G06F3/0653G06F3/0659G06F3/0679
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Quick Facts
Patent No.
US 10,534,543
App. No.
15/996,287
Filed
Jun 1, 2018
Granted
Jan 14, 2020
Kind
B2
Art Unit
2132
USPC
711/103
Abstract

Methods and systems configured to increment one or more counters, including read command total, write command total, total blocks written and read, and low read or write queue depth, when a read or write command is received. When a request for a total device busy time is received, a total device busy time is determined and provided using one or more of the counters and one or more corresponding timing factors.

Claims (93)

1. A computer implemented method comprising:

detecting an operation to a memory sub-system;

in response to detecting the operation, incrementing an operation counter corresponding to the operation and incrementing a block counter by a quantity of data blocks associated with the operation;

identifying a timing factor for the operation;

determining a total memory sub-system busy time based on the operation counter, the block counter, and the timing factor in response to a request for busy time; and

providing the total memory sub-system busy time further in response to the request.

2. The method of claim 1 , wherein incrementing the operation counter and block counter comprises:

in response to determining that the operation is a read operation:

incrementing a read operation counter indicating a quantity of read operations;

incrementing a total blocks read counter by a quantity of data blocks read by the operation;

in response to determining that the operation is a write operation:

incrementing a write operation counter indicating a quantity of write operations;

incrementing a total blocks written counter by a quantity of data blocks written by the operation.

3. The method of claim 2 , wherein determining the total memory sub-system busy time comprises:

computing a sum of the following:

a result of multiplying the read operation counter by a read operation timing factor;

a result of multiplying the total blocks read counter by a blocks read timing factor;

a result of multiplying the write operation counter by a write operation timing factor;

a result of multiplying the total blocks written counter by a blocks written timing factor.

4. The method of claim 3 , further comprising:

in response to determining that the operation to the memory sub-system is the read operation:

incrementing a low read queue depth counter if a current operation queue depth is less than a queue depth threshold;

in response to determining that the operation to the memory sub-system is the write operation:

incrementing a low write queue depth counter if the current operation queue depth is less than the queue depth threshold;

wherein generating the total memory sub-system busy time further comprises computing adding the following to the total memory sub-system busy time:

a result of multiplying the low read queue depth counter by a low read queue depth timing factor; and

a result of multiplying the low write queue depth counter by a low write queue depth timing factor.

5. The method of claim 4 , wherein the current operation queue depth is a counter incremented by a processor when the operation is added to a queue and decremented by the processor when the operation is completed.

6. The method of claim 4 , wherein the low read queue depth timing factor corresponds to a per-read operation time increase when the memory sub-system is processing less than a threshold number of input/output operations.

7. The method of claim 1 , wherein generating the busy time further comprises:

computing a tuning adjustment time by multiplying the total memory sub-system busy time by a tuning time factor; and

adding the tuning adjustment time to the total memory sub-system busy time.

8. A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to:

in response to determining that an operation to a memory sub-system is a read operation:

incrementing a read operation counter indicating a quantity of read operations;

incrementing a total blocks read counter by a quantity of data blocks read by the operation;

in response to determining that the operation to the memory sub-system is a write operation:

incrementing a write operation counter indicating a quantity of write operations;

incrementing a total blocks written counter by a quantity of data blocks written by the operation;

in response to receiving a request for total device busy time, generating the total device busy time by computing a sum of the following:

a result of multiplying the read operation counter by a read operation timing factor;

a result of multiplying the total blocks read counter by a blocks read timing factor;

a result of multiplying the write operation counter by a write operation timing factor;

a result of multiplying the total blocks written counter by a blocks written timing factor; and

providing the total device busy time.

9. The non-transitory computer-readable storage medium of claim 8 , the instructions further comprising:

in response to determining that the operation to the memory sub-system is the read operation:

incrementing a low read queue depth counter if a current operation queue depth is less than a queue depth threshold;

in response to determining that the operation to the memory sub-system is the write operation:

incrementing a low write queue depth counter if the current operation queue depth is less than the queue depth threshold;

wherein generating the total device busy time further comprises computing adding the following to the total device busy time:

a result of multiplying the low read queue depth counter by a low read queue depth timing factor; and

a result of multiplying the low write queue depth counter by a low write queue depth timing factor.

10. The non-transitory computer-readable storage medium of claim 9 , the instructions further comprising:

initializing the memory sub-system, wherein initializing the memory sub-system includes reading the read operation counter, the total blocks read counter, the low read queue depth counter, the write operation counter, the total blocks written counter, and the low write queue depth counter from a non-volatile memory to a volatile memory.

11. The non-transitory computer-readable storage medium of claim 9 , the instructions further comprising:

powering off the memory sub-system, wherein powering off the memory sub-system includes writing the read operation counter, the total blocks read counter, the low read queue depth counter, the write operation counter, the total blocks written counter, and the low write queue depth counter from a volatile memory to a non-volatile memory.

12. The non-transitory computer-readable storage medium of claim 9 , wherein the current operation queue depth is a counter incremented by a processor when the operation is added to a queue and decremented by the processor when the operation is completed.

13. The non-transitory computer-readable storage medium of claim 9 , wherein the low read queue depth timing factor corresponds to a per-read operation time increase when the memory sub-system is processing less than a threshold number of input/output operations.

14. The non-transitory computer-readable storage medium of claim 8 , wherein generating the total device busy time further comprises:

computing a tuning adjustment time by multiplying the total device busy time by a tuning time factor; and

adding the tuning adjustment time to the total device busy time.

15. A memory sub-system comprising:

a memory component; and

a processing device, coupled to the memory component, configured to:

in response to determining that an operation to the memory sub-system is a read operation:

increment a read operation counter indicating a quantity of read operations;

increment a total blocks read counter by a quantity of data blocks read by the operation;

in response to determining that the operation to the memory sub-system is a write operation:

increment a write operation counter indicating a quantity of write operations;

increment a total blocks written counter by a quantity of data blocks written by the operation;

in response to receiving a request for total device busy time, generating the total device busy time by computing a sum of the following:

a result of multiplying the read operation counter by a read operation timing factor;

a result of multiplying the total blocks read counter by a blocks read timing factor;

a result of multiplying the write operation counter by a write operation timing factor;

a result of multiplying the total blocks written counter by a blocks written timing factor; and

provide the total device busy time.

16. The memory sub-system of claim 15 , further configure to:

in response to determining that the operation to the memory sub-system is the read operation:

incrementing a low read queue depth counter if a current operation queue depth is less than a queue depth threshold;

in response to determining that the operation to the memory sub-system is the write operation:

incrementing a low write queue depth counter if the current operation queue depth is less than the queue depth threshold;

wherein generating the total device busy time further comprises computing adding the following to the total device busy time:

a result of multiplying a low read queue depth counter by a low read queue depth timing factor, wherein the low read queue depth timing factor corresponds to an approximate amount of time per-read operation increase when the memory sub-system is processing less operations than the queue depth threshold number of operations; and

a result of multiplying a low write queue depth counter by a low write queue depth timing factor, wherein the low write queue depth timing factor corresponds to an approximate amount of time per-write operation increase when the memory sub-system is processing less operations than the queue depth threshold number of operations.

17. The memory sub-system of claim 16 , further configured to:

initializing the memory sub-system, wherein initializing the memory sub-system includes reading the read operation counter, the total blocks read counter, the low read queue depth counter, the write operation counter, the total blocks written counter, and the low write queue depth counter from a non-volatile memory to a volatile memory.

18. The memory sub-system of claim 16 , further configured to:

powering off the memory sub-system, wherein powering off the memory sub-system includes writing the read operation counter, the total blocks read counter, the low read queue depth counter, the write operation counter, the total blocks written counter, and the low write queue depth counter from a volatile memory to a non-volatile memory.

19. The memory sub-system of claim 16 , wherein the current operation queue depth is a counter incremented by a processor in the processing device when the operation is added to a queue and decremented by the processor when the operation is completed.

20. The memory sub-system of claim 15 , wherein generating the total device busy time further comprises:

computing a tuning adjustment time by multiplying the total device busy time by a tuning time factor; and

adding the tuning adjustment time to the total device busy time.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 11, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050713/0001 →
SUPPLEMENT NO. 9 TO PATENT SECURITY AGREEMENT Recorded Aug 9, 2018
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 047282/0463 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 28, 2018
From: GASKILL, STEVEN; PARK, KIHOON; ZHANG, YIN FENG
To: MICRON TECHNOLOGY, INC.
Reel/Frame 046234/0028 →
Continuity (1)
Related Publication 20190369871A1 · Dec 5, 2019