Interconnect structures with reduced capacitance
The present disclosure relates to semiconductor structures and, more particularly, to interconnect structures with reduced capacitance and methods of manufacture. The method includes: forming one or more lower metal lines in a dielectric material; forming an airgap structure in an upper dielectric material above the one or more lower metal lines, by subjecting material to a curing process; and forming an upper metal structure above the airgap structure.
1. A method, comprising:
forming one or more lower metal lines in a dielectric material;
forming an upper dielectric material above the one or more lower metal lines;
etching portions of the upper dielectric material to form a trench;
depositing material in the trench;
encapsulating the material by depositing another interlevel dielectric material over the material which is deposited within the trench;
forming an airgap structure in the upper dielectric material above the one or more lower metal lines, by subjecting the encapsulated material deposited in the trench of the upper dielectric material to a curing process; and
forming an upper metal structure above the airgap structure.
2. The method of claim 1 , wherein the curing process is a UV cure and the material is an energy removal film.
3. The method of claim 2 , wherein the energy removal film is a carbon based film.
4. A method, comprising:
forming one or more lower metal lines in a dielectric material;
forming an upper dielectric material above the one or more lower metal lines;
etching portions of the upper dielectric material to form a trench;
depositing material in the trench;
forming an airgap structure in the upper dielectric material above the one or more lower metal lines, by subjecting the material deposited in the trench of the upper dielectric material to a curing process; and
forming an upper metal structure above the airgap structure,
wherein the forming of the airgap structure is formed as a single airgap structure in alignment with at least one of the one or more lower meal lines and the upper metal structure, and
wherein the curing process is a UV cure and the material is an energy removal film.
5. The method of claim 2 , wherein the airgap structure is a plurality of airgap structures aligned with at least one of the one or more lower metal lines and the upper metal structure.
6. The method of claim 2 , wherein the UV curing process is provided at a temperature range of about 350 ° C. to about 400 ° C. for about 2 to 5 minutes.
7. The method of claim 1 , wherein the etching of the trench damages the upper dielectric material, and a UV curing process repairs the etch damage to the upper dielectric material caused by forming the trench.
8. The method of claim 1 , further comprising forming an etch stop layer above the one or more lower metal lines, wherein the forming of the trench is an etching process which stops or slightly recesses the etch stop layer above the one or more lower metal lines.
9. The method of claim 1 , wherein the upper metal structure is an interconnect structure.