Cavities containing multi-wiring structures and devices
A method for making an interconnection component includes forming a mask layer that covers a first opening in a sheet-like element that includes a first opening extending between the first and second surfaces of the element. The element consists essentially of a material having a coefficient of thermal expansion of less than 10 parts per million per degree Celsius. The first opening includes a central opening and a plurality of peripheral openings open to the central opening that extends in an axial direction of the central opening. A conductive seed layer can cover an interior surface of the first opening. The method further includes forming a first mask opening in at least a portion of the mask layer overlying the first opening to expose portions of the conductive seed layer within the peripheral openings; and forming electrical conductors on exposed portions of the conductive seed layer.
1. A method for making an interconnection component comprising:
forming a mask layer covering a first opening in a sheet-like element, the sheet-like element having first and second opposed surfaces, the first opening extending between the first and second surfaces, the element consisting essentially of a material having a coefficient of thermal expansion of less than 10 parts per million per degree Celsius, the first opening including a central opening and a plurality of peripheral openings open to the central opening and extending in an axial direction of the central opening, a conductive seed layer covering an interior surface of the first opening and being disposed between the mask layer and the first and second opposed surfaces of the sheet-like element;
forming a first mask opening in at least a portion of the mask layer overlying the first opening to expose portions of the conductive seed layer within the peripheral openings; and
forming electrical conductors on exposed portions of the conductive seed layer, the electrical conductors extending within the peripheral openings and onto the first surface.
2. The method for making an interconnection element of claim 1 , wherein the step of forming electrical conductors comprises plating a metal overlying the conductive seed layer.
3. The method of claim 1 , wherein a thickness of the element is less than 1000 microns between the first and second opposed surfaces.
4. The method of claim 1 , further comprising forming a dielectric layer between the mask layer and the element.
5. The method of claim 4 , further comprising forming a dielectric layer overlying the interior surface of the first opening of the element.
6. The method of claim 4 , further comprising forming a resist layer overlying the dielectric layer.
7. A method for making an interconnection component comprising:
forming a mask layer covering a first opening in a sheet-like element having first and second opposed surfaces, the first opening extending between the first and second surfaces, the sheet-like element consisting essentially of a material having a coefficient of thermal expansion of less than 10 parts per million per degree Celsius, the first opening including a central opening and a plurality of peripheral openings open to the central opening and extending in an axial direction of the central opening;
forming a first mask opening in the mask layer exposing at least portions of interior surfaces of the peripheral openings, wherein other portions of the first opening remain covered by the mask layer; and
forming electrical conductors on the exposed portions of the interior surfaces of the peripheral openings, the conductors extending onto the first surface.
8. The method of claim 7 , wherein the interconnection component includes a conductive seed layer at an interior surface of the first opening and at least a portion of the first surface, wherein the step of forming a first mask opening exposes portions of the seed layer within the peripheral openings, while other portions of the seed layer remain covered by the mask layer, and the step of forming electrical conductors includes forming the electrical conductors on the exposed portions of the conductive seed layer.
9. The method of claim 7 , wherein the step of forming the electrical conductors includes forming a seed layer on the exposed portions of the interior surfaces of the peripheral openings, and forming a plated metal layer on the seed layer.
10. The method of claim 7 , further comprising:
depositing a dielectric layer on the opposed first and second surfaces, and exposed surfaces of the first opening;
depositing a resist material overlying the dielectric layer;
creating resist openings in the resist material using a mask overlying at least a portion of the interconnection component opening;
depositing a metal seed layer within the resist openings and through the first opening of the sheet-like element opening;
plating metal conductors over the metal seed layer; and
removing the resist material to expose surfaces of the metal conductors.
11. The method of claim 7 , wherein the interconnection component opening has an area comprised of overlapping circles.
12. The method of claim 7 , wherein a thickness of the component is less than 1000 microns between the first and second opposed surfaces.