Multi-die inductors with coupled through-substrate via cores
A semiconductor device comprising first and second dies is provided. The first die includes a first through-substrate via (TSV) extending at least substantially through the first die and a first substantially helical conductor disposed around the first TSV. The second die includes a second TSV coupled to the first TSV and a second substantially helical conductor disposed around the second TSV. The first substantially helical conductor is configured to induce a change in a magnetic field in the first and second TSVs in response to a first changing current in the first substantially helical conductor, and the second substantially helical conductor is configured to have a second changing current induced therein in response to the change in the magnetic field in the second TSV.
1. A semiconductor device, comprising:
a first die including:
a first through-substrate via (TSV) extending at least substantially through the first die, and
a first substantially helical conductor disposed around the first TSV; and
a second die including:
a second TSV coupled to the first TSV, and
a second substantially helical conductor disposed around the second TSV,
wherein the first TSV comprises a magnetic core, a non-magnetic middle coaxial layer, and a magnetic outer coaxial layer.
2. The semiconductor device of claim 1 , wherein the first substantially helical conductor is configured to induce a change in a magnetic field in the first and second TSVs in response to a first changing current in the first substantially helical conductor, and wherein the second substantially helical conductor is configured to have a second changing current induced therein in response to the change in the magnetic field in the second TSV.
3. The semiconductor device of claim 1 , wherein the second TSV is magnetically coupled to the first TSV across a distance physically separating the first TSV and the second TSV.
4. The semiconductor device of claim 1 , wherein the first TSV and the second TSV are coaxially aligned.
5. The semiconductor device of claim 1 , wherein the first and second TSVs comprise a ferromagnetic or a ferrimagnetic material.
6. The semiconductor device of claim 1 , wherein the first and second TSVs each comprise substantially vertical sidewalls.
7. The semiconductor device of claim 1 , wherein the first and second TSVs each comprise multiple coaxial laminate layers.
8. The semiconductor device of claim 1 , wherein the second TSV comprises a second magnetic core, a second non-magnetic middle coaxial layer, and a second magnetic outer coaxial layer.
9. The semiconductor device of claim 1 , wherein the first TSV is separated from the first substantially helical conductor by an insulating material, and the second TSV is separated from the second substantially helical conductor by an insulating material.
10. The semiconductor device of claim 1 , wherein the first substantially helical conductor comprises more than one turn around the first TSV, and the second substantially helical conductor comprises more than one turn around the second TSV.
11. The semiconductor device of claim 1 , wherein the first substantially helical conductor is coaxially aligned with the first TSV.
12. The semiconductor device of claim 1 , wherein the second substantially helical conductor is coaxially aligned with the second TSV.
13. A semiconductor device, comprising:
a first die including:
a first through-substrate via (TSV) extending at least substantially through the first die,
a second TSV extending at least substantially through the first die, and
a first substantially helical conductor disposed around the first TSV,
a second die including:
a third TSV coupled to the first TSV,
a fourth TSV coupled to the second TSV, and
a second substantially helical conductor disposed around the third TSV,
wherein the first TSV comprises a magnetic core, a non-magnetic middle coaxial layer, and a magnetic outer coaxial layer.
14. The semiconductor device of claim 13 , wherein the first substantially helical conductor is configured to induce a change in a magnetic field in the first, second, third and fourth TSVs in response to a first changing current in the first substantially helical conductor, and wherein the second substantially helical conductor is configured to have a second changing current induced therein in response to the change in the magnetic field in the third TSV.
15. The semiconductor device of claim 13 , wherein the first, second, third and fourth TSVs comprise a ferromagnetic or a ferrimagnetic material.
16. The semiconductor device of claim 13 , wherein the second TSV is coupled to the first TSV by an upper coupling member above the first substantially helical conductor.
17. The semiconductor device of claim 16 , wherein the upper coupling member comprises a ferromagnetic or a ferrimagnetic material.
18. The semiconductor device of claim 13 , wherein the fourth TSV is coupled to the third TSV by a lower coupling member below the second substantially helical conductor.
19. The semiconductor device of claim 18 , wherein the lower coupling member comprises a ferromagnetic or a ferrimagnetic material.
20. The semiconductor device of claim 13 , wherein the third and fourth TSVs extend at least substantially through the second die.
21. The semiconductor device of claim 13 , wherein the third TSV is magnetically coupled to the first TSV across a first distance physically separating the third TSV and the first TSV, and the fourth TSV is magnetically coupled to the second TSV across a second distance physically separating the fourth TSV and the second TSV.
22. The semiconductor device of claim 13 , wherein the second TSV comprises a second magnetic core, a second non-magnetic middle coaxial layer, and a second magnetic outer coaxial layer.
23. A semiconductor package, comprising:
a first die;
a second die disposed over the first die; and
a coupled inductor including:
a magnetic core having a first through-substrate via (TSV) disposed in the first die and a second TSV disposed in the second die and coupled to the first TSV,
a primary winding disposed around the first TSV, and
a secondary winding disposed around the second TSV,
wherein the first TSV comprises a magnetic core, a non-magnetic middle coaxial layer, and a magnetic outer coaxial layer.
24. The semiconductor package of claim 23 , wherein the primary winding is configured to induce a change in a magnetic field in the first and second TSVs in response to a first changing current in the primary winding, and wherein the secondary winding is configured to have a second changing current induced therein in response to the change in the magnetic field in the second TSV.
25. The semiconductor package of claim 23 , wherein the first TSV extends at least substantially through the first die.
26. The semiconductor package of claim 23 , wherein the second TSV extends at least substantially through the second die.
27. The semiconductor device of claim 23 , wherein the first and second TSVs comprise a ferromagnetic or a ferrimagnetic material.
28. The semiconductor device of claim 23 , wherein the primary winding comprises a substantially helical conductor disposed coaxially around the first TSV.
29. The semiconductor device of claim 23 , wherein the secondary winding comprises a substantially helical conductor disposed coaxially around the second TSV.
30. The semiconductor device of claim 23 , wherein the second TSV comprises a second magnetic core, a second non-magnetic middle coaxial layer, and a second magnetic outer coaxial layer.