Method of making fully molded peripheral package on package device
A method of making a semiconductor device may include providing a carrier comprising a semiconductor die mounting site. A build-up interconnect structure may be formed over the carrier. A first portion of a conductive interconnect may be formed over the build-up interconnect structure in a periphery of the semiconductor die mounting site. An etch stop layer and a second portion of the conductive interconnect may be formed over the first portion of the conductive interconnect. A semiconductor die may be mounted to the build-up interconnect at the semiconductor die mounting site. The conductive interconnect and the semiconductor die may be encapsulated with a mold compound. A first end of the conductive interconnect on the second portion of the conductive interconnect may be exposed. The carrier may be removed to expose the build-up interconnect structure. The first portion of the conductive interconnect may be etched to expose the etch stop layer.
1. A method of making a semiconductor device, comprising:
providing a carrier comprising a semiconductor die mounting site;
forming a build-up interconnect structure over the carrier;
forming a first portion of a conductive interconnect over the build-up interconnect structure in a periphery of the semiconductor die mounting site;
forming an etch stop layer over the first portion of the conductive interconnect;
forming a second portion of the conductive interconnect over the etch stop layer and over the first portion of the conductive interconnect;
mounting a facedown semiconductor die to the build-up interconnect at the semiconductor die mounting site;
encapsulating the conductive interconnect and semiconductor die with a mold compound;
exposing a first end of the conductive interconnect on the second portion of the conductive interconnect;
removing the carrier to expose the build-up interconnect structure; and
etching the first portion of the conductive interconnect to expose the etch stop layer.
2. The method of claim 1 , further comprising forming the etch stop layer as a solderable surface finish that remains over the first portion of the conductive interconnect when the first portion of the conductive interconnect is coupled to a conductive bump.
3. The method of claim 1 , further comprising:
forming the etch stop layer of a material that is not etched by a first etching chemistry that etches the second portion of the conductive interconnect; and
forming the second portion of the conductive interconnect of a copper material that is not etched by a second etching chemistry that etches the etch stop layer.
4. The method of claim 1 , further comprising exposing the first end of the conductive interconnect with a grinding process that removes a portion of the mold compound.
5. The method of claim 1 , wherein forming the etch stop layer comprises forming a layer of solder comprising a thickness in a range of 20-40 μm.
6. The method of claim 5 , further comprising reflowing the solder etch stop layer to form a bump after etching the second portion of the conductive interconnect to expose the etch stop layer.
7. A method of making a semiconductor device, comprising:
providing a redistribution layer (RDL) comprising a die mounting site;
forming conductive interconnects over the redistribution layer in a periphery of the semiconductor die mounting site;
mounting a facedown semiconductor die to the RDL at the semiconductor die mounting site;
encapsulating the conductive interconnects and semiconductor die with mold compound after forming the conductive interconnects;
exposing first ends of the conductive interconnects; and
etching the conductive interconnects to recess the first ends of the conductive interconnects with respect to the mold compound.
8. The method of claim 7 , wherein providing the RDL further comprising forming a build-up interconnect structure, the build-up interconnect structure connecting the semiconductor die and the conductive interconnects.
9. The method of claim 7 , further comprising disposing a underfill material between the facedown semiconductor die and the RDL.
10. The method of claim 7 , further comprising mounting a surface mount device (SMD) to the RDL adjacent the semiconductor die and the conductive interconnects.
11. The method of claim 7 , wherein each of the conductive interconnects comprise:
a first portion;
a second portion; and
an etch stop layer disposed between the first portion and the second portion.
12. The method of claim 11 , further comprising:
forming the etch stop layer of solder; and
reflowing the solder etch stop layer to form a bump after etching the second portion of the conductive interconnects to expose the etch stop layer of each conductive interconnect.
13. The method of claim 11 , further comprising forming the etch stop layer as a surface finish that remains over the first portion of the conductive interconnects.
14. A method of making a semiconductor device, comprising:
providing a carrier comprising a redistribution layer (RDL) as part of a build-up interconnect structure disposed over a temporary carrier, the carrier further comprising a semiconductor die mounting site;
disposing conductive interconnects over the carrier and RDL in a periphery of the semiconductor die mounting site;
mounting a semiconductor die coupled to the RDL at the semiconductor die mounting site;
encapsulating the conductive interconnects and semiconductor die with mold compound; and
exposing first ends of the conductive interconnects.
15. The method of claim 14 , further comprising:
providing an offset between an end of each of the conductive interconnects with respect to a surface of the mold compound; and
providing a solder bump over the end of each of the conductive interconnects.
16. The method of claim 14 , further comprising land pads coupled to the conductive interconnects and to the RDL.
17. The method of claim 14 , wherein the conductive interconnects are formed before being coupled to the RDL.
18. The method of claim 14 , wherein mounting the semiconductor die to the RDL at the semiconductor die mounting site further comprises mounting the semiconductor die facedown.
19. The method of claim 14 , wherein each of the conductive interconnects further comprise:
a first portion;
a second portion; and
an etch stop layer disposed between the first portion and the second portion.
20. The method of claim 19 , further comprising forming the etch stop layer as a surface finish that remains over the first portion of the conductive interconnects.
21. The method of claim 19 , further comprising:
forming the etch stop layer of solder; and
reflowing the solder etch stop layer to form a bump after etching the second portion of the conductive interconnects to expose the etch stop layer of each conductive interconnect.