Terahertz detector comprised of p-n junction diode
A method of forming a semiconductor detector including: forming a p-n junction diode in an active device layer of a silicon-on-insulator (SOI) substrate, the active device layer being formed on an insulator layer of the SOI substrate; forming a first opening through the insulator layer to access a backside of a first doped region of the diode, the first doped region underlying a second doped region of the diode; forming a back contact on a back surface of the first doped region and electrically connecting with the first doped region; forming a conductive interconnect layer on an upper surface of the SOI substrate, the interconnect layer including a first top contact providing electrical connection with the second doped region; and forming an electrode in the first opening on the backside of the detector structure, the electrode providing electrical connection with the back contact of the diode.
1. A semiconductor device comprising at least one p-n junction diode formed on a silicon-on-insulator (SOI) substrate, the p-n junction diode comprising:
first and second doped regions formed in an active device layer of the SOI substrate, the first doped region being formed on an upper surface of the second doped region and having a first conductivity type associated therewith, the second doped region having a second conductivity type associated therewith, the second conductivity type being opposite in polarity to the first conductivity type;
a depletion region formed at an interface between the first and second doped regions;
a back contact formed on a back surface of the second doped region and electrically connecting with the second doped region;
a conductive interconnect layer formed on an upper surface of the SOI substrate, the interconnect layer comprising a first top contact providing electrical connection with the first doped region;
an electrode of the p-n junction diode formed on the backside of the semiconductor device, the electrode providing electrical connection with the back contact; and
a conductive structure formed through the SOI substrate, the conductive structure being electrically isolated from the first doped region and, in conjunction with the electrode, providing electrical connection between the second doped region and a second top contact in the interconnect layer formed on the upper surface of the SOI substrate.
2. The semiconductor device of claim 1 , wherein the second doped region comprises epitaxially grown p + -doped hydrogenated crystalline silicon with 5 to 40 atomic percent hydrogen.
3. The semiconductor device of claim 1 , wherein the p-n junction diode further comprises shallow trench isolation (STI) structures formed in the active device layer proximate an upper surface of the SOI substrate and extending vertically through the active device layer to the insulator layer, the first and second doped regions being formed between two laterally adjacent STI structures.
4. The semiconductor device of claim 3 , wherein the conductive structure is formed through at least a given one of the STI structures, the conductive structure providing electrical connection between the second top contact formed on the upper surface of the SOI substrate and the electrode of the p-n junction diode formed on the backside of the semiconductor device.
5. The semiconductor device of claim 1 , wherein the p-n junction diode further comprises a dielectric layer formed on at least a portion of an upper surface of the active device layer of the SOI substrate.
6. A semiconductor device comprising at least one p-n junction diode formed on a silicon-on-insulator (SOI) substrate, the p-n junction diode comprising:
first and second doped regions formed in an active device layer of the SOI substrate, the first doped region being formed on an upper surface of the second doped region and having a first conductivity type associated therewith, the second doped region having a second conductivity type associated therewith, the second conductivity type being opposite in polarity to the first conductivity type;
a depletion region formed at an interface between the first and second doped regions;
a back contact formed on a back surface of the second doped region and electrically connecting with the second doped region;
a conductive interconnect layer formed on an upper surface of the SOI substrate, the interconnect layer comprising a first top contact providing electrical connection with the first doped region; and
an electrode of the p-n junction diode formed on the backside of the semiconductor device, the electrode providing electrical connection with the back contact;
wherein the second doped region comprises n-doped silicon, and wherein the back contact of the p-n junction diode comprises epitaxially grown n + -doped hydrogenated crystalline silicon.
7. The semiconductor device of claim 6 , wherein the back contact comprises epitaxially grown n + -doped hydrogenated crystalline silicon with 5 to 40 atomic percent hydrogen.