Forming a combination of long channel devices and vertical transport Fin field effect transistors on the same substrate
A method of forming a vertical transport fin field effect transistor and a long-channel field effect transistor on the same substrate, including, forming a recessed region in a substrate and a fin region adjacent to the recessed region, forming one or more vertical fins on the fin region, forming a long-channel pillar from the substrate in the recessed region, where the long-channel pillar is at a different elevation than the one or more vertical fins, forming two or more long-channel source/drain plugs on the long-channel pillar, forming a bottom source/drain plug in the fin region, where the bottom source/drain plug is below the one or more vertical fins, forming a gate structure on the long-channel pillar and a gate structure on the one or more vertical fins, and forming a top source/drain on the top surface of the one or more vertical fins.
1. A vertical transport fin field effect transistor and a long-channel field effect transistor, comprising:
one or more vertical fins on a first region of a substrate, wherein the one or more vertical fins extend away from the substrate;
a bottom source/drain on the first region below the one or more vertical fins;
a fin gate structure on the one or more vertical fins;
a top source/drain on the top surface of the one or more vertical fins;
a long-channel pillar on a second region of the substrate adjacent to the first region;
a pillar gate structure on the long-channel pillar; and
two long-channel source/drains on the long-channel pillar, wherein a first long-channel source/drain is on an opposite side of the long-channel pillar from a second long-channel source/drain.
2. The vertical transport fin field effect transistor and a long-channel field effect transistor of claim 1 , wherein the pillar gate structure on the long-channel pillar has an inverted “T” shape directly above a central section of the long-channel pillar.
3. The vertical transport fin field effect transistor and a long-channel field effect transistor of claim 1 , wherein the fin gate structure on the one or more vertical fins includes a gate dielectric layer and a conductive gate electrode.
4. The vertical transport fin field effect transistor and a long-channel field effect transistor of claim 1 , wherein the top source/drain is silicon-germanium (SiGe) with a germanium concentration in the range of about 40 at. % Ge to about 80 at. % Ge.
5. The vertical transport fin field effect transistor and a long-channel field effect transistor of claim 1 , wherein the long-channel pillar has a length in the range of about 100 nm to about 600 nm.
6. The vertical transport fin field effect transistor and a long-channel field effect transistor of claim 1 , further comprising electrical contacts to the long-channel source/drain, bottom source/drain, top source/drain, long-channel gate structure, and vertical fin gate structure.
7. The vertical transport fin field effect transistor and a long-channel field effect transistor of claim 1 , further comprising a dielectric fill layer that covers the long-channel pillar but not the one or more vertical fins.
8. The vertical transport fin field effect transistor and a long-channel field effect transistor of claim 7 , further comprising a bottom spacer layer on the fill layer, and an interlayer dielectric (ILD) layer on the bottom spacer layer.
9. The vertical transport fin field effect transistor and a long-channel field effect transistor of claim 8 , further comprising a gate dielectric layer on the long-channel pillar and the one or more vertical fins.
10. A vertical transport fin field effect transistor and a long-channel field effect transistor on a substrate, comprising:
one or more vertical fins on a first region of the substrate;
a long-channel pillar on a second region of the substrate adjacent to the first region, wherein the long-channel pillar is at a different elevation than the one or more vertical fins;
a bottom source/drain on the first region below the one or more vertical fins;
two or more long-channel source/drains on the long-channel pillar;
a pillar gate structure on the long-channel pillar; and
a fin gate structure on the one or more vertical fins.
11. The vertical transport fin field effect transistor and a long-channel field effect transistor of claim 10 , wherein the bottom source/drain below the one or more vertical fins has the same thickness as the two or more long-channel source/drains on the long-channel pillar.
12. The vertical transport fin field effect transistor and a long-channel field effect transistor of claim 10 , wherein the fin gate structure on the one or more vertical fins includes a gate dielectric layer on the sidewalls of the one or more vertical fins and a conductive gate electrode on the gate dielectric layer.
13. The vertical transport fin field effect transistor and a long-channel field effect transistor of claim 10 , further comprising a top source/drain on the one or more vertical fins.
14. The vertical transport fin field effect transistor and a long-channel field effect transistor of claim 10 , wherein the long-channel pillar has a length in the range of about 100 nm to about 600 nm.
15. A vertical transport fin field effect transistor and a long-channel field effect transistor on the same substrate, comprising:
one or more vertical fins on a fin region of a substrate, wherein the one or more vertical fins extend away from the substrate;
a long-channel pillar on a recessed region of the substrate, where the recessed region is adjacent to the fin region, and the long-channel pillar is at a different elevation than the one or more vertical fins;
a bottom source/drain on the fin region below the one or more vertical fins;
two or more long-channel source/drains on the long-channel pillar;
a pillar gate structure on the long-channel pillar;
a fin gate structure on the one or more vertical fins; and
a top source/drain on the top surface of the one or more vertical fins, where the top source/drain is in the fin region.
16. The vertical transport fin field effect transistor and a long-channel field effect transistor of claim 15 , wherein the gate structure on the long-channel pillar has an inverted “T” shape directly above a central section of the long-channel pillar.
17. The vertical transport fin field effect transistor and a long-channel field effect transistor of claim 16 , wherein the gate structure on the one or more vertical fins includes a gate dielectric layer and a conductive gate electrode.
18. The vertical transport fin field effect transistor and a long-channel field effect transistor of claim 16 , wherein the top source/drain is silicon-germanium (SiGe) with a germanium concentration in the range of about 40 at. % Ge to about 80 at. % Ge.
19. The vertical transport fin field effect transistor and a long-channel field effect transistor of claim 16 , wherein the long-channel pillar has a length in the range of about 100 nm to about 600 nm.
20. The vertical transport fin field effect transistor and a long-channel field effect transistor of claim 16 , further comprising electrical contacts to the long-channel source/drain, bottom source/drain, top source/drain, long-channel gate structure, and vertical fin gate structure.