IP Library Granted Patent US 10,446,480
Granted Patent B2
US 10,446,480 · App. 16/101,259 · Granted Oct 15, 2019

Through-substrate via structure and method of manufacture

Inventors: Michael J. Seddon (Gilbert, AZ); Francis J. Carney (Mesa, AZ)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H01L23/49827H01L21/02035H01L21/288H01L21/304H01L21/308H01L21/3065H01L21/3083H01L21/486H01L21/4825H01L21/4853H01L21/565H01L21/67069H01L21/6835H01L21/76877H01L21/76898H01L21/78H01L22/12H01L22/26H01L23/3107H01L23/3114H01L23/481H01L23/4822H01L23/4951H01L23/49503H01L23/49541H01L23/49562H01L23/49575H01L23/49811H01L23/49838H01L23/49866H01L23/544H01L23/562H01L24/00H01L24/05H01L25/0655H01L25/0657H01L25/50H01L27/0207H01L27/088H01L27/14H01L27/14683H01L29/0847H02M3/158H01L23/147H01L23/15H01L23/3677H01L23/49816H01L27/14625H01L27/14685H01L2221/68327H01L2223/5446H01L2223/54426H01L2224/0401H01L2224/04042H01L2224/05083H01L2224/05084H01L2224/05124H01L2224/05139H01L2224/05144H01L2224/05147H01L2224/05155H01L2224/05164H01L2224/05166H01L2224/05171H01L2224/05172H01L2224/05184H01L2224/13025H01L2224/13111H01L2224/13116H01L2225/06555H01L2225/06593H01L2225/06596H01L2924/13055H01L2924/13091
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Quick Facts
Patent No.
US 10,446,480
App. No.
16/101,259
Granted
Oct 15, 2019
Kind
B2
Abstract

A through-substrate vias structure includes a substrate having opposing first and second major surfaces. One or more conductive via structures are disposed extending from the first major surface to a first vertical distance within the substrate. A recessed region extends from the second major surface to a second vertical distance within the substrate and adjoining a lower surface of the conductive via. In one embodiment, the second vertical distance is greater than the first vertical distance. A conductive region is disposed within the recessed region and is configured to be in electrical and/or thermal communication with the conductive via.

Claims (88)

1. A through-substrate via structure comprising:

a substrate having a first major surface and a second major surface opposite to the first major surface;

a conductive via structure comprising:

a trench extending from the first major surface to a first distance; and

a conductive material disposed within the trench;

a recessed region disposed extending from the second major surface inward to a second distance, wherein the recessed region is wider than the conductive via structure;

a first conductive region disposed so as to completely fill the recessed region; and

an insulating layer disposed between the first conductive region and the substrate within the recessed region, wherein:

the insulating layer comprises an opening that exposes the conductive material;

the insulating layer extends outside of the recessed region and overlaps the second major surface;

the insulating layer comprises an outer surface distal to and overlapping the second major surface outside of the recessed region;

the first conductive region comprises:

a conductive layer disposed within the recessed region adjacent to and extending along a surface of the insulating layer; and

a solder region disposed within the recessed region and adjacent to the conductive layer;

the conductive layer is interposed between the solder region and the insulating layer;

an uppermost portion of the conductive layer is substantially coplanar with the outer surface of the insulating layer; and

the conductive layer extends into the opening and is physically and electrically coupled to the conductive material through the opening.

2. The structure of claim 1 , wherein:

at least a portion of the conductive layer comprises copper.

3. The structure of claim 1 , wherein:

the conductive layer physically contacts the conductive material at an interface between the substrate and the insulating layer.

4. The structure of claim 1 , wherein:

the conductive material comprises tungsten;

the second distance is greater than or equal to 150 microns;

the first distance is less than about 50 microns; and

the through-substrate via structure comprises an interposer structure.

5. The structure of claim 1 , wherein:

the conductive material comprises tungsten.

6. The structure of claim 1 , wherein:

the insulating layer comprises a polymer.

7. The structure of claim 1 , wherein:

the first conductive region protrudes outward from the recessed region and outward from the second major surface.

8. The structure of claim 1 , wherein:

the solder region extends outside of the recessed region such that a distal end portion of the solder region protrudes outward with respect to the outer surface of the insulating layer.

9. The structure of claim 1 , wherein:

the substrate comprises an insulating material.

10. A through-substrate via structure comprising:

a substrate having a first major surface and a second major surface opposite to the first major surface;

a conductive via structure comprising:

a trench extending from the first major surface to a first distance;

an insulating structure disposed along a sidewall surface of the trench; and

a conductive material disposed adjacent to the insulating structure within the trench;

a recessed region disposed extending from the second major surface inward to a second distance, wherein the second distance is greater than the first distance, and wherein the second distance is greater than or equal to about 150 microns;

a first conductive region disposed so as to completely fill the recessed region; and

an insulating layer disposed between the first conductive region and the substrate within the recessed region, wherein:

the insulating layer comprises an opening that exposes the conductive material;

the insulating layer extends outside of the recessed region and overlaps the second major surface;

the insulating layer comprises an outer surface distal to and overlapping the second major surface outside of the recessed region;

the first conductive region comprises:

a conductive layer disposed within the recessed region adjacent to and extending along a surface of the insulating layer; and

a solder region disposed within the recessed region and adjacent to the conductive layer;

the conductive layer is interposed between the solder region and the insulating layer; and

the conductive layer extends inside of the opening and physically contacts the conductive material at an interface between the substrate and the insulating layer.

11. The structure of claim 10 , wherein:

the first distance is less than about 50 microns; and

at least a portion of the first conductive region comprises copper.

12. The structure of claim 10 , wherein:

an uppermost portion of the conductive layer is substantially coplanar with the outer surface of the insulating layer; and

the solder region extends outside of the recessed region such that a distal end portion of the solder region protrudes outward with respect to the outer surface of the insulating layer.

13. The structure of claim 10 , wherein:

the insulating layer comprises a polymer material; and

the conductive material comprises tungsten.

14. A through-substrate via structure comprising:

a substrate having a first major surface and a second major surface opposite to the first major surface;

a conductive via structure comprising:

a trench extending from the first major surface to a first distance; and

a conductive material comprising tungsten disposed within the trench;

a recessed region disposed extending from the second major surface inward to a second distance, wherein the recessed region is wider than the conductive via structure;

a first conductive region disposed so as to completely fill the recessed region; and

an insulating layer disposed between the first conductive region and the substrate within the recessed region, wherein:

the insulating layer comprises an opening that exposes the conductive material;

the insulating layer extends outside of the recessed region and overlaps the second major surface;

the insulating layer comprises an outer surface distal to and overlapping the second major surface outside of the recessed region;

the first conductive region comprises:

a conductive layer disposed within the recessed region adjacent to and extending along a surface of the insulating layer; and

a solder region disposed within the recessed region and adjacent to the conductive layer;

the conductive layer is interposed between the solder region and the insulating layer; and

an uppermost portion the conductive layer is substantially coplanar with the outer surface of the insulating layer proximate to where the recessed region meets the second major surface.

15. The structure of claim 14 , wherein:

the solder region extends outside of the recessed region such that a distal end portion of the solder region protrudes outward with respect to the outer surface of the insulating layer.

16. The structure of claim 14 , wherein:

the recessed region extends into the substrate a distance greater than or equal to about 150 microns; and

the conductive layer extends into the opening and is physically and electrically coupled to the conductive material through the opening at an interface between the insulating layer and the substrate.

17. The structure of claim 14 , wherein:

than the first distance is less than 50 microns; and

at least a portion of the first conductive region comprises copper.

18. The structure of claim 14 , wherein:

the through-substrate via structure comprises an interposer having at least one side with a width of at least 15 millimeters.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 047399, FRAME 0631 Recorded Jun 23, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064078/0001 →
SECURITY INTEREST Recorded Nov 1, 2018
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 047399/0631 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 10, 2018
From: SEDDON, MICHAEL J.; CARNEY, FRANCIS J.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 046618/0743 →