Forming strained channel with germanium condensation
A method for forming a semiconductor device includes forming a strained fin on a substrate, a sacrificial gate on a channel region of the fin, a first spacer adjacent to a sidewall of the fin, and a second spacer adjacent to the first spacer. A source/drain region is grown on an exposed portion of the fin. Atoms are driven from the source/drain region into the fin and form an oxide layer on the source/drain region. The second spacer and the oxide layer are removed. An insulator layer is formed over the source/drain region, and the sacrificial gate is removed to expose the channel region of the fin. A gate stack is formed over the channel region of the fin.
1. A semiconductor device comprising:
a strained fin including a lower portion arranged on a substrate;
a gate stack arranged over a channel region of the fin;
a spacer arranged adjacent to a sidewall of the gate stack;
a source/drain region arranged on the fin, the source/drain region spaced a distance from the spacer, the source/drain region including a strained region arranged below a crystalline portion of the source/drain region;
a doped source/drain extension region arranged in the fin between the source/drain region and the spacer.
2. The device of claim 1 , wherein strained region extends into the strained fin and comprises a semiconductor material interposed between crystalline portion and the lower portion.
3. The device of claim 2 , wherein the substrate comprises silicon (Si).
4. The device of claim 3 , wherein the strained region comprises silicon germanium (SiGe).
5. The device of claim 4 , wherein the crystalline portion comprises germanium (Ge).
6. The device of claim 2 , wherein the lower portion of the strained fin has a first concentration of a first type of atoms and the strained region has a second concentration of the first type of atoms that is greater than the first concentration.
7. The device of claim 6 , wherein the first type of atoms is germanium (Ge).
8. The device of claim 1 , wherein the spacer comprises a nitride material.
9. The device of claim 1 , further comprising a liner layer on the outer surface of the spacers.
10. The device of claim 9 wherein the liner layer extends over an upper surface of the source/drain region.
11. A semiconductor device comprising:
a semiconductor fin including a lower fin portion that contacts an upper surface of a substrate and an upper fin portion that contacts a source/drain region, the semiconductor fin further including a plurality of strained regions interposed between the lower fin portion and the source/drain region; and
a plurality of gate stacks, each gate stack arranged on the upper fin portion; and
multiple pairs of doped source/drain extension regions embedded in the semiconductor fin, each pair of doped source/drain extension regions located beneath a respective gate stack.
12. The semiconductor device of claim 11 , wherein each pair of doped source/drain extension regions includes a first doped source/drain extension region extending laterally from a first strained region and an opposing second doped source/drain extension region extending laterally from a second strained region.
13. The semiconductor device of claim 12 , wherein at least one of the strained regions is interposed between first and second gate stacks among the plurality of gate stacks.
14. The semiconductor device of claim 13 , wherein the at least one interposed strained region is arranged between a first doped source/drain extension region extending beneath the first gate stack and a second doped source/drain extension region extending beneath the second gate stack.
15. The semiconductor device of claim 14 , wherein the strained region comprises a semiconductor material.
16. The semiconductor device of claim 15 , wherein the substrate comprises silicon (Si).
17. The semiconductor device of claim 16 , wherein the strained region comprises silicon germanium (SiGe).
18. The semiconductor device of claim 17 , wherein the source/drain region comprises germanium (Ge).
19. The semiconductor device of claim 11 , wherein the lower portion of the semiconductor fin has a first concentration of a first type of atoms and the strained regions have a second concentration of the first type of atoms that is greater than the first concentration.
20. The semiconductor device of claim 19 , wherein the first type of atoms is germanium (Ge).