Vertical field effect transistor having two-dimensional channel structure
A vertical field effect transistor (VFET) including a first source/drain region, a channel structure upwardly protruding from the first source/drain region and configured to serve as a channel, the channel structure having a two-dimensional structure in a plan view, the channel structure having an opening at at least one side thereof, the channel structure including one or two first portions and one or more second portions, the one or two first portion extending in a first direction, and the one or more second portions connected to corresponding one or more of the one or more first portions and extending in a second direction, the second direction being different from the first direction, a gate structure horizontally surrounding the channel structure, and a second source/drain region upwardly on the channel structure may be provided.
1. A vertical field effect transistor (VFET) comprising:
a first source/drain region;
a channel structure upwardly protruding from the first source/drain region and configured to serve as a channel, the channel structure having a two-dimensional structure in a plan view, the channel structure having an opening at at least one side thereof, the channel structure including one or two first portions and one or more second portions, the one or two first portion extending in a first direction, and the one or more second portions connected to corresponding one or more of the one or two first portions and extending in a second direction, the second direction being different from the first direction;
a gate structure horizontally surrounding the channel structure in a completely enclosing manner in a plan view; and
a second source/drain region upwardly on the channel structure.
2. The VFET of claim 1 , wherein the second source/drain region and the channel structure are provided in a fin structure, the fin structure being a protruded portion of a substrate.
3. The VFET of claim 2 , wherein the first source/drain region is provided in the substrate.
4. The VFET of claim 2 , wherein the first source/drain region is provided in the fin structure.
5. The VFET of claim 1 , wherein the second source/drain region vertically protrudes above the gate structure.
6. The VFET of claim 1 , wherein the channel structure has at least one of a Π shape, a H shape, a [ ] shape, an X shape or a Z shape.
7. A vertical field effect transistor (VFET) comprising:
a substrate including a first source/drain region;
a channel structure protruding from the first source/drain region and configured to serve as a channel, the channel structure having a two-dimensional shape in a plan view, the channel structure having an opening at at least one side thereof;
a gate structure horizontally surrounding the channel structure in a completely enclosing manner in a plan view; and
a second source/drain region on the channel structure.
8. The VFET of claim 7 , wherein the channel structure is provided in a fin structure, the fin structure being a protruded portion of the substrate.
9. The VFET of claim 8 , wherein the second source/drain region is provided in the fin structure.
10. The VFET of claim 7 , wherein the second source/drain region vertically protrudes above the gate structure.
11. The VFET of claim 7 , wherein the channel structure includes a first portion extending in a first direction, and at least one second portion connected to the first portion and extending in a second direction, the second direction being different from the first direction.
12. A vertical field effect transistor (VFET) comprising:
a first source/drain region included in a substrate;
a channel structure vertically protruding from the first source/drain region of the substrate and configured to serve as a channel, the channel structure having a two-dimensional structure in a plan view, the channel structure having an opening at at least one side thereof, the channel structure including two or more first portions extending in a first direction and at least one second portion connecting the two or more first portions;
a gate structure horizontally surrounding the channel structure in a completely enclosing manner in a plan view; and
a second source/drain region on the channel structure, the second source/drain region facing the first source/drain region with the channel structure vertically interposed therebetween.
13. The VFET of claim 12 , wherein the channel structure is provided in a fin structure, the fin structure being a protruded portion of the substrate.
14. The VFET of claim 13 , wherein the second source/drain region is provided in the fin structure.
15. The VFET of claim 12 , wherein the second source/drain region vertically protrudes above the gate structure.
16. The VFET of claim 12 , wherein a number of the two or more first portions is two, and a number of the at least one second portion is one.
17. The VFET of claim 12 , wherein a number of the two or more first portions is three, and a number of the at least one second portion is one.
18. The VFET of claim 12 , wherein a number of the two or more first portions is three, and a number of the at least one second portion is two.
19. The VFET of claim 12 , wherein the channel structure has at least one of a Π shape, a H shape, a E shape, or a shape.