Stacked semiconductor device structure and method

1. A method of forming stacked semiconductor device structure comprising:

providing a first semiconductor device comprising:

a first major surface and a second major surface opposite to the first major surface, wherein:

the second major surface comprises a recessed region bounded by sidewall portions; and

the sidewall portions have outer surfaces defining peripheral edge segments of the first semiconductor device; and

a first conductive layer disposed over the recessed region, wherein the first conductive layer is a continuous layer that covers each of the sidewall portions and at least two segments of the second major surface between the recessed region and the peripheral edge segments;

providing a second semiconductor device comprising a third major surface and a fourth major surface opposite to the third major surface; and

electrically coupling a first portion of the second semiconductor device to the first conductive layer within the recessed region such that at least a portion of the second semiconductor device is disposed within the recessed region.

2. The method of claim 1 , wherein:

providing the first semiconductor device comprises providing a first singulated region of semiconductor material having the first major surface and the second major surface; and

providing the second semiconductor device comprises providing a second singulated region of semiconductor material having the third major surface and the fourth major surface.

3. The method of claim 1 further comprising:

providing a conductive lead frame comprising conductive lead structures;

electrically coupling the sidewall portions to a first conductive lead structure and a second conductive lead structure respectively;

electrically coupling the fourth major surface to a third conductive lead structure;

electrically coupling a portion of the first semiconductor device to a fourth conductive lead structure; and

providing a package body encapsulating at least portions of the conductive lead frame, the first semiconductor device, and the second semiconductor device, wherein:

portions of the first conductive lead structure, the second conductive lead structure, the third conductive lead structure, and the fourth conductive lead structure are exposed to an outside of the package body.

4. The method of claim 3 further comprising:

electrically coupling another portion of the first semiconductor device to a fifth conductive lead structure; and

electrically coupling a second portion of the second semiconductor device to a sixth conductive lead structure.

5. The method of claim 4 further comprising:

electrically coupling a third portion of the second semiconductor device to a seventh conductive lead structure, wherein:

forming the package body comprises providing portions of the fifth conductive lead structure, the sixth conductive lead structure, and the seventh conductive lead structure exposed to the outside of the package body.

6. The method of claim 4 , wherein:

electrically coupling the second portion of the second semiconductor device to the sixth conductive lead structure comprises electrically coupling using a through-semiconductor via disposed within the second semiconductor device.

7. The method of claim 3 further comprising:

electrically coupling a third semiconductor device to one or more of a first control electrode of the first semiconductor device and a second control electrode of the second semiconductor device.

8. The method of claim 7 , wherein:

electrically coupling the portion of the first semiconductor device to the fourth conductive lead structure comprises electrically coupling with a conductive clip; and

the method further comprises attaching the third semiconductor device to the conductive clip.

9. The method of claim 1 , wherein:

the recessed region is bounded by only two sidewall portions; and

the second semiconductor device extends outside of the recessed region.

10. The method of claim 1 , wherein:

providing the first semiconductor device comprises providing a first MOSFET device; and

providing the second semiconductor device comprises providing a second MOSFET device.

11. A method of forming a stacked semiconductor device comprising:

providing a stacked semiconductor die structure comprising:

a first semiconductor die having a recessed portion extending inward from a major surface and a first conductive layer disposed within the recessed portion; and

a second semiconductor die electrically coupled to the first semiconductor die within the recessed portion;

providing a conductive substrate comprising a plurality of leads; and

electrically coupling the first semiconductor die and the second semiconductor die to the conductive substrate; and

providing a package body encapsulating at least a portion of the conductive substrate and at least portions of the stacked semiconductor die structure, wherein:

electrically coupling comprises attaching a first portion of the first semiconductor die to a first lead and attaching a first portion of the second semiconductor die to a second lead; and

providing the package body comprises exposing portions of the plurality of leads to an outside of the package body.

12. The method of claim 11 , wherein:

providing the stacked semiconductor die structure comprises providing the recessed portion bounded by sidewall portions having outward facing surfaces defining peripheral edge segments of the first semiconductor die; and

electrically coupling comprises electrically coupling the first conductive layer to two of the plurality of leads.

13. The method of claim 12 , wherein:

providing the stacked semiconductor die structure comprises providing the first conductive layer disposed over the recessed region including the sidewall portions within the recessed portion and segments of the major surface between the recessed portion and the peripheral edge segments.

14. The method of claim 11 , wherein:

providing the stacked semiconductor die structure comprises providing the first semiconductor die with the recessed region bounded by sidewall portions; and

attaching the first portion of the first semiconductor die to the first lead comprises attaching one of the sidewall portions to the first lead.

15. The method of claim 11 wherein:

electrically coupling the first semiconductor die comprises electrically coupling with a conductive clip structure; and

the method further comprises attaching a third semiconductor die to a surface of the conductive clip structure.

16. A method of forming a stacked semiconductor device structure comprising:

providing a semiconductor substrate having a first major surface and a second major surface opposite to the first major surface and a first semiconductor device formed as part of the semiconductor substrate;

forming a recessed region extending inward from the second major surface;

providing a first conductive layer within the recessed region; and

singulating the semiconductor substrate to provide the first semiconductor device as a singulated structure; and

electrically coupling a second semiconductor device to the first conductive layer within the recessed region, wherein:

providing the semiconductor substrate comprises providing the first semiconductor device disposed adjacent the first major surface;

forming the recessed region comprises forming the recessed region bounded by sidewall portions, each sidewall portion extending outward from a recessed surface portion;

singulating comprises singulating through the sidewall portions;

electrically coupling the second semiconductor device comprises:

providing the second semiconductor device having a third major surface and a fourth major surface opposite to the third major surface; and

electrically coupling the third major surface of the second semiconductor device to the first conductive layer within the recessed region; and

the method further comprises:

providing a conductive lead frame comprising a plurality of conductive lead structures;

electrically coupling a first sidewall portion to a first conductive lead structure; and

electrically coupling the fourth major surface to a second conductive lead structure.

17. The method of claim 16 further comprising forming a package body encapsulating at least portions of the first semiconductor device and the second semiconductor device.

18. The method of claim 17 , wherein:

forming the package body comprises exposing portions of the plurality of conductive lead structures to an outside of the package body.

19. The method of claim 16 , further comprising:

electrically coupling the third major surface of the second semiconductor device to a third conductive lead structure using a through-substrate via disposed within the second semiconductor device.

20. The method of claim 16 further comprising:

providing a third semiconductor device; and

electrically coupling the third semiconductor device to one or more of the first semiconductor device and the second semiconductor device.