METHOD FOR FORMING HIGH DENSITY STRUCTURES WITH IMPROVED RESIST ADHESION TO HARD MASK
A method for manufacturing an array of small pitch small feature size structures on a wafer. The method includes depositing a device layer, depositing a hard mask layer over the device layer, depositing a thin SiO 2 adhesion layer over the hard mask layer and then forming a photoresist mask over the SiO 2 adhesion layer. The presence of the SiO 2 adhesion layer prevents toppling or deformation of the photoresist mask, thereby allowing the image of the photoresist mask to be accurately and reliably transferred onto the underlying hard mask. Then, the image of the hard mask can be accurately transferred to the underlying device layer.
1 . A method for forming a high-density array of features, the method comprising:
forming a device material layer on a wafer;
depositing a hard mask layer over the device material layer;
depositing a SiO 2 adhesion layer over the hard mask layer;
forming a photoresist mask over the SiO 2 adhesion layer;
transferring the image of the photoresist mask onto the underlying SiO 2 adhesion layer and hard mask layer; and
transferring the image of the hard mask layer onto the underlying device material.
2 . The method as in claim 1 , wherein the SiO 2 adhesion layer is deposited to a thickness that is no greater than 2 nm.
3 . The method as in claim 1 , further comprising, after depositing the SiO 2 adhesion layer, baking the wafer to a temperature of greater than 120 C.
4 . The method as in claim 1 , further comprising, after depositing the SiO 2 adhesion layer and before forming the photoresist mask, treating the SiO 2 adhesion layer with an adhesion promoter.
5 . The method as in claim 1 , further comprising, after depositing the SiO 2 adhesion layer and before forming the photoresist mask, treating the SiO 2 adhesion layer with hexamethyldisilazane.
6 . The method as in claim 1 , wherein the forming a photoresist mask further comprises spinning on a photoresist material, photolithographically exposing the photoresist material, developing the photoresist material and hard baking the developed photoresist material.
7 . The method as in claim 6 , wherein the developing the photoresist is performed using a tetramethyl ammonium hydroxide aqueous, sodium chloride-sodium hydroxide aqueous solution.
8 . The method as in claim 1 , wherein the device material comprises a plurality of layers configured to define an array of magnetic memory elements.
9 . The method as in claim 1 , wherein the device material comprises a material configured to form a nano-imprinting mask.
10 . The method as in claim 9 , wherein the device material comprises quartz.
11 . The method as in claim 1 , wherein the hard mask comprises one or more of Cr and TaN.
12 . The method as in claim 1 , wherein the SiO 2 adhesion layer is deposited by physical vapor deposition, atomic layer deposition or sputter deposition.
13 . The method as in claim 1 , wherein the image of the photoresist mask is transferred onto the underlying SiO 2 adhesion layer and the hard mask layer by performing a reactive ion etching using a chemistry that is chosen to selectively remove the material of the hard mask layer.
14 . The method as in claim 1 , wherein the photoresist mask is formed by spinning on a photoresist material and performing an electron beam patterning of the photoresist material.
15 . A method for manufacturing a magnetic memory array, the method comprising:
providing a substrate;
depositing a series of memory element layers over the substrate;
depositing a hard mask layer over the series of memory element materials;
depositing a SiO 2 adhesion layer over the hard mask layer;
depositing a layer of photoresist over the SiO 2 adhesion layer;
patterning and developing the photoresist to form a photoresist mask;
performing a performing first material process to transfer the image of the image of the photoresist mask onto the underlying SiO 2 adhesion layer and hard-mask; and
performing a second material removal process to transfer the image of the hard-mask onto the underlying series of magnetic memory element layers.
16 . The method as in claim 15 , wherein the first material removal process comprises reactive ion etching and the second material removal process comprises ion milling.
17 . The material removal process as in claim 15 , wherein the first material removal process comprises a first reactive ion etching in a first chemistry and the second material removal process comprises a second reactive ion etching using a second chemistry that is different from the first chemistry.
18 . The method as in claim 15 , wherein the SiO 2 adhesion layer is deposited to a thickness not greater than 1 nm.
19 . The method as in claim 15 , further comprising after depositing the SiO 2 adhesion layer, performing a baking.
20 . The method as in claim 15 , wherein the SiO 2 adhesion layer is deposited by physical vapor deposition, atomic layer deposition or sputter deposition.