IP Library Granted Patent US 10,566,268
Granted Patent B1
US 10,566,268 · App. 16/142,623 · Granted Feb 18, 2020

Package to die connection system and method therefor

Inventors: Mark Douglas Hall (Austin, TX); Walter J. Ciosek (Austin, TX); David Russell Tipple (Leander, TX)
Assignee: NXP USA, INC.
H01L23/4952H01L21/481H01L21/4825H01L23/49503H01L23/49537H01L23/49548H01L23/49558H01L23/49575H01L23/5283H01L24/05H01L24/48H01L24/73H01L24/80H01L25/04H01L2224/05541H01L2224/05567H01L2224/48177H01L2224/73251H01L2224/80815
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Quick Facts
Patent No.
US 10,566,268
App. No.
16/142,623
Granted
Feb 18, 2020
Kind
B1
Abstract

A package to die connection system and method are provided. The system includes a semiconductor device having a substrate with a top surface. A gasket is affixed to the top surface of the substrate and has at least one cavity with a portion of the cavity open to a sidewall of the gasket. A semiconductor die is attached to the top surface of the substrate. A sidewall of the semiconductor die is abutted with the sidewall of the gasket. A portion of a metal layer is exposed to the open portion of the cavity. A pillar located in the cavity is electrically connected to the exposed portion of the metal layer.

Claims (34)

1. A semiconductor device comprising:

a substrate having a top surface;

a gasket affixed to the top surface of the substrate, the gasket having at least one cavity with a portion of the at least one cavity open to a sidewall of the gasket;

a semiconductor die attached to the top surface of the substrate, a sidewall of the semiconductor die abutted with the sidewall of the gasket and having a portion of a metal layer exposed to the open portion of the at least one cavity; and

a pillar located in the at least one cavity and electrically connected to the exposed portion of the metal layer.

2. The device of claim 1 , wherein the pillar comprises a reflowable conductive material and is configured to reflow when subjected to a predetermined amount of heat to form the electrical connection.

3. The device of claim 1 , further comprising a leadframe having a first lead electrically connected to the exposed portion of the metal layer by way of the pillar.

4. The device of claim 3 , wherein the first lead is configured to provide a ground voltage to the semiconductor die.

5. The device of claim 3 , wherein the leadframe further comprises a second lead electrically connected to a bond pad located on a top surface of the semiconductor die by way of a bond wire.

6. The device of claim 1 , wherein the exposed portion of the metal layer is coupled to circuitry within the semiconductor die.

7. The device of claim 6 , wherein the exposed portion of the metal layer is coupled to at least a portion of a seal ring formed in the metal layer of the semiconductor die.

8. The device of claim 1 , wherein the substrate comprises a ceramic material having a conductive layer formed at the top surface.

9. The device of claim 8 , wherein the cavity includes an opening at the bottom and wherein the pillar located in the cavity forms an electrical connection with the conductive layer and the exposed portion of the metal layer.

10. The device of claim 1 , wherein the gasket is formed from a plastic, ceramic, or dielectric material and is formed as a ring having a rectangular or square shape, the ring having inner opening dimensions substantially similar to outer dimensions of the semiconductor die.

11. A semiconductor device comprising:

a substrate having a top surface;

a non-conductive gasket affixed to the top surface of the substrate, the non-conductive gasket having a first cavity with a first portion of the first cavity open to a first sidewall of the non-conductive gasket;

a first semiconductor die having a portion of a first metal layer exposed through a sidewall, the first semiconductor die attached to the top surface of the substrate and abutted with the first sidewall of the non-conductive gasket such that the exposed portion of the first metal layer and the open first portion of the first cavity are collocated; and

a first pillar located in the first cavity and electrically connected to the exposed portion of the first metal layer.

12. The device of claim 11 , wherein the first pillar comprises a copper pillar with a reflowable conductive material formed around the copper pillar, the first pillar configured to reflow when subjected to a predetermined amount of heat to form the electrical connection.

13. The device of claim 11 , wherein the substrate includes a conductive layer formed at the top surface.

14. The device of claim 13 , further comprising a second portion of the gasket having a second cavity, the second cavity having an opening at the bottom, and wherein a second pillar located in the second cavity forms an electrical connection with the conductive layer and a package lead.

15. The device of claim 11 , further comprising a second semiconductor die having a portion of a second metal layer exposed through a sidewall, the second semiconductor die attached to the top surface of the substrate and abutted with a second sidewall of the non-conductive gasket such that the exposed portion of the second metal layer and a second open portion of the first cavity at the second sidewall are collocated, and wherein an electrical connection is formed between the first metal layer of the first semiconductor die and the second metal layer of the second semiconductor die by way of the first pillar located in the first cavity.

16. The device of claim 15 , wherein the exposed portion of the first metal layer is coupled to circuitry within the first semiconductor die and the exposed portion of the second metal layer is coupled to circuitry within the second semiconductor die.

17. The device of claim 11 , wherein the exposed portion of the first metal layer has a width dimension in a range of 10 microns to 100 microns at the sidewall of the first semiconductor die.

18. A method comprising:

forming a first cavity in a first portion of a gasket, the first cavity having a first open portion on a first sidewall of the gasket and a second open portion on a second sidewall of the gasket;

attaching the gasket to a top surface of a substrate;

attaching a semiconductor die having a portion of a first metal layer exposed through a first sidewall to the top surface of the substrate and abutted with the first sidewall of the gasket, the exposed portion of the first metal layer collocated with the first open portion on the first sidewall of the gasket; and

reflowing a pillar located in the first cavity to form an electrical connection with the exposed portion of the first metal layer.

19. The method of claim 18 , further comprising providing a leadframe abutted with the second sidewall of the gasket, an end of a lead of the leadframe collocated with the second open portion on the second sidewall of the gasket, and wherein reflowing the pillar forms an electrical connection between the exposed portion of the first metal layer and the lead.

20. The method of claim 18 , further comprising:

forming a second cavity in a second portion of the gasket, the second portion of the gasket having a third sidewall abutted with a second sidewall of the semiconductor die, a second metal layer exposed through the second sidewall of the semiconductor die; and

reflowing a second pillar located in the second cavity to form an electrical connection with the exposed portion of the second metal layer.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 10, 2024
From: NXP USA, INC.
To: CHIP PACKAGING TECHNOLOGIES, LLC
Reel/Frame 068541/0903 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 26, 2018
From: HALL, MARK DOUGLAS; CIOSEK, WALTER J.; TIPPLE, DAVID RUSSELL
To: NXP USA, INC.
Reel/Frame 046981/0041 →