IP Library Granted Patent US 10,770,553
Granted Patent B2
US 10,770,553 · App. 16/143,757 · Granted Sep 8, 2020

Layered structure, semiconductor device including layered structure, and semiconductor system including semiconductor device

Inventors: Tokiyoshi Matsuda (Kyoto, JP); Takashi Shinohe (Kyoto, JP); Shingo Yagyu (Kyoto, JP); Takuto Igawa (Kyoto, JP)
Assignee: FLOSFIA INC.
H01L29/267H01L21/0262H01L21/02483H01L21/02554H01L21/02565H01L21/02628H01L29/04H01L29/24H01L29/7787H01L29/22H01L29/7371H01L29/778
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Quick Facts
Patent No.
US 10,770,553
App. No.
16/143,757
Granted
Sep 8, 2020
Kind
B2
Abstract

In a first aspect of a present inventive subject matter, a layered structure includes a first semiconductor layer containing as a major component an ε-phase oxide semiconductor crystal; and a second semiconductor layer positioned on the first semiconductor layer and containing as a major component an oxide semiconductor crystal with a tetragonal crystal structure.

Claims (45)

1. A layered structure, comprising:

a first semiconductor layer comprising as a major component an ε-phase oxide semiconductor crystal; and

a second semiconductor layer positioned on the first semiconductor layer and comprising as a major component an oxide semiconductor crystal with a tetragonal crystal structure.

2. The layered structure of claim 1 , wherein

the ε-phase oxide semiconductor crystal comprised in the first semiconductor layer comprises gallium.

3. The layered structure of claim 1 , wherein

the ε-phase oxide semiconductor crystal comprised in the first semiconductor layer comprises ε-Ga 2 O 3 .

4. The layered structure of claim 1 , wherein

the ε-phase oxide semiconductor crystal comprised in the first semiconductor layer comprises a mixed crystal comprising ε-Ga 2 O 3 .

5. The layered structure of claim 1 , wherein

the oxide semiconductor crystal with the tetragonal crystal structure comprised in the second semiconductor layer comprises tin.

6. The layered structure of claim 1 , wherein

the oxide semiconductor crystal with the tetragonal crystal structure comprised in the second semiconductor layer comprises SnO 2 .

7. The layered structure of claim 1 , wherein

the oxide semiconductor crystal with the tetragonal crystal structure comprised in the second semiconductor layer comprises a mixed crystal comprising SnO 2 .

8. The layered structure of claim 1 , further comprising:

three or more layers comprising the first semiconductor layer, the second semiconductor layer, and a third layer positioned on the first semiconductor layer.

9. The layered structure of claim 1 , further comprising:

three or more layers comprising the first semiconductor layer, the second semiconductor layer, and a third layer positioned on the second semiconductor layer.

10. The layered structure of claim 8 , further comprising:

a heterojunction between two semiconductor layers selected from among the three or more layers.

11. The layered structure of claim 8 , wherein

the third layer is an electrically insulating layer.

12. A semiconductor device, comprising:

a layered structure, comprising a first semiconductor layer that comprises an ε-phase oxide semiconductor crystal and a second semiconductor layer that is positioned on the first semiconductor layer and comprises an oxide semiconductor crystal with a tetragonal crystal structure; and

a heterojunction between the first semiconductor layer and the second semiconductor layer.

13. A semiconductor device, comprising:

a layered structure, comprising a first semiconductor layer that comprises an ε-phase oxide semiconductor crystal and a second semiconductor layer that is positioned on the first semiconductor layer and comprises an oxide semiconductor crystal with a tetragonal crystal structure;

a first electrode electrically connected to the layered structure; and

a second electrode electrically connected to the layered structure.

14. The semiconductor device of claim 13 , wherein

the semiconductor device is a transistor.

15. The semiconductor device of claim 13 , wherein

the semiconductor device is a semiconductor memory.

16. The semiconductor device of claim 13 , wherein

the semiconductor device is a light-emitting device or an opto-electronic device.

17. The semiconductor device of claim 13 , wherein

the semiconductor device is a solar cell.

18. The semiconductor device of claim 13 , wherein

the semiconductor device is a power device.

19. The semiconductor device of claim 13 , wherein

the semiconductor device has a high-frequency characteristic.

20. A system, comprising:

a circuit board; and

a semiconductor device, comprising a layered structure that comprises a first semiconductor layer comprising an ε-phase oxide semiconductor crystal, and a second semiconductor layer positioned on the first semiconductor layer and comprising an oxide semiconductor crystal with a tetragonal crystal structure, a first electrode electrically connected to the layered structure, and a second electrode electrically connected to the layered structure, the semiconductor device being electrically connected to the circuit board.

Assignments (2)
CHANGE OF ASSIGNEE ADDRESS Recorded Jun 6, 2019
From: FLOSFIA INC.
To: FLOSFIA INC.
Reel/Frame 049393/0558 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 27, 2018
From: MATSUDA, TOKIYOSHI; SHINOHE, TAKASHI; YAGYU, SHINGO; IGAWA, TAKUTO
To: FLOSFIA INC.
Reel/Frame 046992/0814 →
Priority Claims (1)
JP 2017-191608 · Sep 29, 2017 · national
Continuity (1)
Related Publication 20190103465A1 · Apr 4, 2019