IP Library Granted Patent US 10,438,848
Granted Patent B2
US 10,438,848 · App. 16/176,272 · Granted Oct 8, 2019

Inorganic lift-off profile process for semiconductor wafer processing

Inventors: Leon Benton Pearce (Campbell, CA); Glenn Anthony Silveira (Santa Clara, CA)
Assignee: Semi Automation & Technologies, Inc.
H01L21/7688G03F7/162G03F7/20G03F7/26H01L21/0272H01L21/0274H01L21/76804
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Quick Facts
Patent No.
US 10,438,848
App. No.
16/176,272
Granted
Oct 8, 2019
Kind
B2
Abstract

An Inorganic Lift-Off-Profile-Process (referred to herein as “ILOPP”) is described wherein a portion of a surface inorganic oxide is etched from a substrate oxide surface and under a photoresist edge that supports a sacrificial metal layer. This oxide etched profile under the sacrificial photoresist/metal edge improves Lift-Off of the sacrificial metal layer and delivers smoother, improved metal edge definition in addition to an improved planer surface (flatness) as compared to known LOP technologies.

Claims (25)

1. A semiconductor fabrication method comprising:

depositing a first layer of oxide on a semiconductor substrate;

depositing a first layer of photoresist on the first layer of oxide;

masking and developing the first layer of photoresist thereby exposing a surface of the first layer of oxide;

etching the exposed surface of the first layer of oxide thereby creating an undercut area under an edge of the first layer of photoresist;

depositing a layer of metal on the exposed surface of the first layer of oxide and on the first layer of photoresist with a discontinuity therebetween;

removing the first layer of photoresist and the layer of metal on the first layer of photoresist using a Lift-Off process;

depositing a second layer of oxide on the layer of metal on the exposed surface of the first layer of oxide and on the first oxide layer;

depositing a second layer of photoresist on the second layer of oxide;

masking and developing the second layer of photoresist down thereby exposing a surface of the second layer of oxide;

etching the exposed surface of the second layer of oxide down to the metal layer thereby creating a contact area on the metal layer; and,

removing the second layer of photoresist.

2. The semiconductor fabrication method of claim 1 wherein depositing the first layer of oxide on a semiconductor substrate is done via a thermally grown inorganic oxide.

3. The semiconductor fabrication method of claim 1 wherein depositing the first layer of photoresist on the first layer of oxide is done using a photoresist spinner.

4. The semiconductor fabrication method of claim 1 wherein the first layer of photoresist has a high thermal stability.

5. The semiconductor fabrication method of claim 1 wherein etching the exposed surface of the first layer of oxide thereby creating the undercut area under the edge of the first layer of photoresist is done using a wet etch.

6. The semiconductor fabrication method of claim 1 wherein etching the exposed surface of the first layer of oxide thereby creating the undercut area under the edge of the first layer of photoresist is done to a depth that is similar to a thickness of the subsequently deposited layer of metal.

7. The semiconductor fabrication method of claim 1 wherein etching the exposed surface of the first layer of oxide thereby creating the undercut area under the edge of the first layer of photoresist is done using a Buffered Oxide Etch (“BOE”) solution.

8. The semiconductor fabrication method of claim 1 wherein etching the exposed surface of the first layer of oxide thereby creating the undercut area under the edge of the first layer of photoresist is an isotropic etching.

9. The semiconductor fabrication method of claim 1 wherein depositing the layer of metal on the exposed surface of the first layer of oxide forms a primary metal layer and wherein depositing the layer of metal on the first layer of photoresist forms a sacrificial metal layer.

10. The semiconductor fabrication method of claim 1 wherein removing the first layer of photoresist and the layer of metal on the first layer of photoresist using a Lift-Off process is done via agitation in a chemical solvent solution.

11. The semiconductor fabrication method of claim 1 wherein removing the first layer of photoresist and the layer of metal on the first layer of photoresist using a Lift-Off process creates oxide isolation areas between portions of the first layer of metal on the first layer of oxide remaining after the Lift-Off process.

12. The semiconductor fabrication method of claim 1 wherein depositing a second layer of oxide on the layer of metal on the exposed surface of the first layer of oxide and on the first oxide layer is done using a Chemical Vapor Deposition (CVD) process.

13. The semiconductor fabrication method of claim 1 wherein depositing a second layer of photoresist on the second layer of oxide is done using a photoresist spinner.

14. The semiconductor fabrication method of claim 1 wherein etching the exposed surface of the second layer of oxide down to the metal layer thereby creating a contact area on the metal layer is done using a wet etched, isotropic, process.

Assignments (6)
RELEASE OF SECURITY INTEREST Recorded Nov 13, 2024
From: CENTERFIELD CAPITAL PARTNERS IV, L.P.
To: SEMI AUTOMATION & TECHNOLOGIES, LLC
Reel/Frame 069251/0337 →
SECURITY INTEREST Recorded Nov 12, 2024
From: SEMI AUTOMATION & TECHNOLOGIES, LLC
To: BAIN CAPITAL CREDIT, LP, AS ADMINISTRATIVE AGENT
Reel/Frame 069229/0445 →
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2024
From: FIRST MERCHANTS BANK
To: SEMI AUTOMATION & TECHNOLOGIES, LLC
Reel/Frame 069236/0411 →
SECURITY INTEREST Recorded Jan 13, 2022
From: SEMI AUTOMATION & TECHNOLOGIES, LLC
To: CENTERFIELD CAPITAL PARTNERS IV, L.P., AS AGENT
Reel/Frame 058651/0641 →
SECURITY INTEREST Recorded Jan 10, 2022
From: SEMI AUTOMATION & TECHNOLOGIES, LLC
To: FIRST MERCHANTS BANK
Reel/Frame 058591/0629 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 31, 2018
From: PEARCE, LEON BENTON; SILVEIRA, GLENN ANTHONY
To: SEMI AUTOMATION & TECHNOLOGIES, INC.
Reel/Frame 047370/0007 →
Continuity (2)
Provisional Application 62580115 · Nov 1, 2017
Related Publication 20190131168A1 · May 2, 2019