SiC power semiconductor device with integrated body diode
Embodiments of SiC devices and corresponding methods of manufacture are provided. In some embodiments, the SiC device has shielding regions at the bottom of some gate trenches and non-linear junctions formed with the SiC material at the bottom of other gate trenches. In other embodiments, the SiC device has the shielding regions at the bottom of the gate trenches and arranged in rows which run in a direction transverse to a lengthwise extension of the trenches. In still other embodiments, the SiC device has the shielding regions and the non-linear junctions, and wherein the shielding regions are arranged in rows which run in a direction transverse to a lengthwise extension of the trenches.
1. A semiconductor device, comprising:
a SiC material of a first conductivity type;
a plurality of trenches extending into the SiC material, each trench having opposing sidewalls and a bottom;
a first electrode formed in a lower part of the trenches;
a second electrode formed in an upper part of the trenches and insulated from both the first electrode and the SiC material;
a channel region of a second conductivity type adjacent the opposing sidewalls of each trench;
a source region of the first conductivity type above the channel region and adjacent the opposing sidewalls of each trench;
a shielding region of the second conductivity type at the bottom of a first subset of the trenches, each shielding region being electrically connected to the corresponding first electrode through an opening in an insulating material at the bottom of the first subset of trenches; and
a non-linear junction formed with the SiC material at the bottom of a second subset of the trenches different than the first subset.
2. The semiconductor device of claim 1 , wherein the non-linear junction is formed between the SiC material and the first electrode at the bottom of the second subset of the trenches.
3. The semiconductor device of claim 2 , wherein the first electrode formed in the lower part of the trenches comprises doped polysilicon.
4. The semiconductor device of claim 1 , wherein a metal is formed below the first electrode in the second subset of trenches, wherein the non-linear junction is a Schottky junction, and wherein the Schottky junction is formed between the SiC material and the metal at the bottom of the second subset of the trenches.
5. The semiconductor device of claim 4 , wherein the first electrode formed in the lower part of the trenches comprises a semiconductor material.
6. The semiconductor device of claim 4 , wherein the first electrode contacts the shielding region at the bottom of the first subset of trenches.
7. The semiconductor device of claim 4 , wherein a metal is formed below the first electrode in the first subset of the trenches, and wherein the metal contacts the shielding region at the bottom of the first subset of the trenches.
8. The semiconductor device of claim 1 , wherein the shielding regions and the non-linear junctions are arranged in an alternating manner below successive ones of the trenches.
9. The semiconductor device of claim 1 , wherein the shielding regions are arranged at corners of a grid or wherein the shielding regions form part of a grid.
10. The semiconductor device of claim 9 , wherein the insulating material is present at the bottom of the trenches between adjacent ones of the shielding regions.
11. The semiconductor device of claim 1 , wherein the shielding regions extend in parallel with one another in lines that run parallel to the trenches, and wherein the shielding regions have a different pitch than the trenches.
12. The semiconductor device of claim 1 , wherein the shielding regions are arranged at the bottom of the first subset of trenches and at the bottom of the second subset of trenches, and wherein some of the shielding regions are segmented and other ones of the shielding regions are contiguous over a length of the trenches.
13. The semiconductor device of claim 1 , wherein the shielding regions are arranged in rows which run in a direction transverse to a lengthwise extension of the trenches.
14. A semiconductor device, comprising:
a SiC material of a first conductivity type;
a plurality of trenches extending into the SiC material, each trench having opposing sidewalls and a bottom;
a first electrode formed in a lower part of the trenches;
a second electrode formed in an upper part of the trenches and insulated from both the first electrode and the SiC material;
a channel region of a second conductivity type adjacent the opposing sidewalls of each trench;
a source region of the first conductivity type above the channel region and adjacent the opposing sidewalls of each trench; and
a shielding region of the second conductivity type at the bottom of the trenches and electrically connected to the corresponding first electrode through an opening in an insulating material at the bottom of the trenches,
wherein the shielding regions are arranged in rows which run in a direction transverse to a lengthwise extension of the trenches.
15. The semiconductor device of claim 14 , wherein the insulating material is present at the bottom of the trenches between adjacent rows of the shielding regions.
16. The semiconductor device of claim 14 , further comprising a non-linear junction formed with the SiC material at the bottom of the trenches.
17. The semiconductor device of claim 16 , wherein a metal is formed below the first electrode in the trenches, wherein the non-linear junction is a Schottky junction, and wherein the Schottky junction is formed between the SiC material and the metal at the bottom of the trenches.
18. The semiconductor device of claim 16 , wherein the insulating material is present at the bottom of the trenches between adjacent rows of the shielding regions to divide the non-linear junction in the same trench into a plurality of non-linear junction segments separated from one another by the insulating material.
19. The semiconductor device of claim 14 , wherein the shielding regions are contiguous over a length of the trenches.
20. The semiconductor device of claim 14 , wherein the rows of shielding regions run in a direction orthogonal or nearly orthogonal to the lengthwise extension of the trenches.