Face down dual sided chip scale memory package
View Patent ↗A semiconductor die that includes a first die located on a first side of an interposer and a second die located on a second side of the interposer. Active sides of the first and second dies may each face the interposer. A bond wire may electrically connect the first die to the second side of the interposer and a bond wire may electrically connect the second die to the first side of the interposer. The bond wires may extend through a plurality of windows in the interposer. First and second dies may be attached to a first side of an interposer and may be electrically connected to a second side of the interposer through windows and third and fourth dies may be attached to a second side of the interposer and may be electrically connected to the first side of the interposer through windows.
1. A semiconductor device comprising:
an interposer having a first side and a second side opposite of the first side;
a first die having a perimeter located on the first side of the interposer, wherein the first die comprises an active side opposite a back side, the active side of the first die facing the first side of the interposer;
a first window through the interposer, wherein at least a portion of the first window extends outside of the perimeter of the first die;
at least one bond wire electrically connecting the first die to the second side of the interposer through the first window;
a second die having a perimeter located on the second side of the interposer;
a second window through the interposer, wherein at least a portion of the second window extends outside of the perimeter of the second die; and
at least one bond wire electrically connecting the second die to the first side of the interposer through the second window.
2. The semiconductor device of claim 1 , wherein the second die comprises an active side opposite a back side, the active side of the second die facing the second side of the interposer.
3. The semiconductor device of claim 2 , wherein the first die and the second die are each rectangular having a longitudinal axis and wherein the longitudinal axis of the second die is substantially perpendicular to the longitudinal axis of the first die.
4. The semiconductor device of claim 3 , the second side of the interposer further comprising a first plurality of solder balls and a second plurality of solder balls.
5. The semiconductor device of claim 4 , wherein the second die is positioned between the first plurality of solder balls and the second plurality of solder balls.
6. The semiconductor device of claim 5 , wherein the first die comprises a memory die and the second die comprises a controller die.
7. A method of making a semiconductor device comprising:
attaching a first die having a perimeter to a first side of an interposer, the interposer having a first opening, wherein a portion of the first opening extends outside of the perimeter of the first die;
electrically connecting the first die to a second side of the interposer via a bond wire through the first opening in the interposer;
attaching a second die having a perimeter to a second side of the interposer, the interposer having a second opening, wherein a portion of the second opening extends outside of the perimeter of the second die; and
electrically connecting the second die to the first side of the interposer via a bond wire through the second opening in the interposer.
8. The method of claim 7 , comprising electrically connecting the first die to the second side of the interposer via a bond wire through a third opening in the interposer.
9. The method of claim 8 , wherein a portion of the third opening extends outside of the perimeter of the first die.
10. The method of claim 9 , comprising electrically connecting the second die to the first side of the interposer via a bond wire through a fourth opening in the interposer.
11. The method of claim 10 , wherein a portion of the fourth opening extends outside of the perimeter of the second die.
12. A semiconductor device comprising:
an interposer having a first side and a second side opposite of the first side;
a first die located on the first side of the interposer;
a first window through the interposer;
a second window through the interposer, wherein a first portion of the first die is positioned over the first window and wherein a second portion of the first die is positioned over the second window;
a first bond wire that electrically connects the first die to the second side of the interposer through the first window;
a second bond wire that electrically connects the first die to the second side of the interposer through the second window;
a second die located on the second side of the interposer;
a third window through the interposer;
a fourth window through the interposer;
a third bond wire that electrically connects the second die to the first side of the interposer through the third window; and
a fourth bond wire that electrically connects the second die to the first side of the interposer through the fourth window.
13. The semiconductor device of claim 12 , wherein a first portion of the second die is positioned over the third window and wherein a second portion of the second die is positioned over the fourth window.
14. The semiconductor device of claim 12 , wherein the first die and the second die are each rectangular having a longitudinal axis and wherein the longitudinal axis of the second die is substantially perpendicular to the longitudinal axis of the first die.
15. The semiconductor device of claim 14 , wherein the first die is positioned between the third window and the fourth window and wherein the second die is positioned between the first window and the second window.