IP Library Granted Patent US 10,757,504
Granted Patent B2
US 10,757,504 · App. 16/197,411 · Granted Aug 25, 2020

Methods and apparatus for controlling a bias voltage

Inventor: Akinobu Onishi (Ota, JP)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H04R3/00H02M3/07H04R19/005H04R2201/003H04R2410/03
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Quick Facts
Patent No.
US 10,757,504
App. No.
16/197,411
Granted
Aug 25, 2020
Kind
B2
Abstract

Various embodiments of the present technology may comprise methods and apparatus for controlling a bias voltage. Methods and apparatus for controlling a bias voltage to an electrical device according to various aspects of the present invention may comprise a voltage regulator circuit to generate a first voltage, a clock driver circuit to generate a second voltage, and a charge pump system to generate the bias voltage and supply the bias voltage to the electrical device. The apparatus may be responsive to a control signal that indicates a startup operation of the electrical device.

Claims (54)

1. An integrated circuit capable of generating a bias voltage, comprising:

a voltage regulator circuit configured to:

receive a control signal; and

generate a regulator voltage in response to the control signal;

a clock driver circuit coupled to the voltage regulator circuit and configured to generate a clock driver output signal in response to the regulator voltage; and

a charge pump system coupled to the clock driver circuit and configured to generate the bias voltage in response to the clock driver output signal.

2. The integrated circuit according to claim 1 , wherein the integrated circuit is responsive to a micro electro-mechanical device and the control signal indicates a start-up operation of the micro electro-mechanical device.

3. The integrated circuit according to claim 2 , wherein the bias voltage reaches a target value during a first period after start-up and maintains the target value after the first period.

4. The integrated circuit according to claim 1 , wherein:

the clock driver circuit is further configured to receive a clock signal; and

the clock driver circuit generates the clock driver output signal in response to the regulator voltage and the clock signal.

5. The integrated circuit according to claim 1 , wherein the voltage regulator circuit comprises:

a primary circuit configured to generate a reference voltage; and

a secondary circuit coupled to the primary circuit and configured to generate the regulator voltage according to the reference voltage;

wherein the regulator voltage is proportional to the reference voltage.

6. The integrated circuit according to claim 5 , wherein at least one of the primary circuit and the secondary circuit is responsive to the control signal.

7. The integrated circuit according to claim 1 , wherein the regulator voltage reaches a regulator maximum value during the first period and shifts to a regulator minimum value after the first period.

8. The integrated circuit according to claim 1 , wherein the charge pump system comprises:

a charge pump circuit configured to generate a charge pump output voltage and comprising:

a plurality of charge pump units connected in series and responsive to a clock signal; and

a integrator circuit directly coupled to a first charge pump unit from the plurality of charge pump units;

a low-pass filter coupled to an output terminal of the charge pump circuit; and

a diode coupled in parallel with the low-pass filter.

9. The integrated circuit according to claim 8 , wherein:

the charge pump output voltage reaches a charge pump maximum value during the first period and shifts to a charge pump minimum value after the first period; and

the difference between the regulator maximum value and the regulator minimum value is equal to a threshold voltage of the diode divided by the plurality of charge pump units.

10. A method for generating a bias voltage supplied to micro electro-mechanical device, comprising:

generating a control signal;

generating a first voltage according to the control signal;

generating a second voltage according to:

the first voltage; and

a clock signal; and

generating the bias voltage according to the second voltage.

11. The method according to claim 10 , further comprising generating a third voltage according to a supply voltage, wherein the second voltage is proportional to the third voltage.

12. The method according to claim 10 , wherein the control signal indicates a start-up operation of the micro electro-mechanical device.

13. The method according to claim 12 , wherein the bias voltage reaches a target value during a first period after the start-up operation and maintains the target value after the first period.

14. The method according to claim 13 , wherein the second voltage reaches a maximum value during the first period and shifts to a minimum value after the first period.

15. The method according to claim 13 , further comprising generating a fourth voltage according to the second voltage, wherein the fourth voltage reaches a maximum value during the first period and shifts to a minimum value after the first period.

16. A system, comprising:

a micro electro-mechanical device; and

an integrated circuit responsive to the micro electro-mechanical device, and configured to:

generate a first voltage according to a control signal; wherein the control signal indicates a start-up operation of the micro electro-mechanical device;

generate a second voltage according to the first voltage and a clock signal;

generate a bias voltage according to the second voltage; and

supply the bias voltage to the micro electro-mechanical device.

17. The system according to claim 16 , wherein the integrated circuit comprises a charge pump system configured to generate the third voltage, wherein the charge pump system comprises:

a charge pump circuit configured to generate a charge pump output voltage according to the second voltage, wherein the charge pump circuit comprises:

a plurality of charge pump units connected in series with each other, wherein each charge pump unit is responsive to the clock signal; and

a integrator circuit directly coupled to a first charge pump unit from the plurality of charge pump units;

a low-pass filter coupled to an output terminal of the charge pump circuit; and

a diode coupled in parallel with the low-pass filter.

18. The system according to claim 16 , wherein the bias voltage reaches a target value during a first period after start-up and maintains the target value after the first period.

19. The system according to claim 18 , wherein the second voltage reaches a maximum value during the first period and shifts to a minimum value after the first period.

20. The system according to claim 16 , further comprising generating a third voltage according to a supply voltage, wherein the second voltage is proportional to the third voltage.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 048327, FRAME 0670 Recorded Jun 23, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064079/0001 →
SECURITY INTEREST Recorded Feb 13, 2019
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 048327/0670 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 21, 2018
From: ONISHI, AKINOBU
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 047559/0447 →
Continuity (2)
Continuation 15613437 · Jun 5, 2017
Related Publication 20190090054A1 · Mar 21, 2019