Electronic device
View Patent ↗An electronic device applicable to an artificial neuron network. The electronic device includes a first circuit, a second circuit, and first to sixth wirings. The first circuit includes a first transistor, a second transistor, and a capacitor. The second circuit includes a third transistor. A gate of the third transistor is electrically connected to the third wiring. The capacitor capacitively couples the third wiring and the gate of the second transistor. The first circuit is capable of storing a weight as an analog value. The first transistor is typically an oxide semiconductor transistor.
1. A neural network comprising:
an artificial neuron comprising a first transistor and a capacitor;
a first line;
a second line; and
an input circuit configured to supply potential corresponding to an input value of the artificial neuron,
wherein a gate of the first transistor is electrically connected to the first line,
wherein a first terminal of the first transistor is electrically connected to a first terminal of the capacitor,
wherein a second terminal of the capacitor is electrically connected to the input circuit via the second line, and
wherein a channel formation region of the first transistor comprises an oxide semiconductor.
2. The neural network according to claim 1 , further comprising:
a circuit comprising a second transistor,
wherein a channel formation region of the second transistor comprises silicon.
3. The neural network according to claim 1 ,
wherein the first transistor is provided over a silicon substrate.
4. A neural network comprising:
artificial neurons each comprising a transistor and a capacitor;
an input circuit configured to supply potential corresponding to input values of the artificial neurons,
wherein a first terminal of the transistor is electrically connected to a first terminal of the capacitor,
wherein a second terminal of the capacitor is electrically connected to the input circuit via the second line,
wherein a channel formation region of the transistor comprises an oxide semiconductor, and
wherein the transistors are configured to control weakening of bonds between synapses of the neural network.
5. The neural network according to claim 4 ,
wherein the transistors are provided over a silicon substrate.
6. The neural network according to claim 4 ,
wherein in each of the artificial neurons, the transistor is configured to hold a potential of the node.
7. A neural network comprising:
artificial neurons each comprising a first transistor and a capacitor; and
a first circuit configured to perform calculation using outputs of the artificial neurons,
an input circuit configured to supply potential corresponding to input values of the artificial neurons,
wherein a first terminal of the first transistor is electrically connected to a first terminal of the capacitor,
wherein a second terminal of the capacitor is electrically connected to the input circuit, and
wherein a channel formation region of the first transistor comprises an oxide semiconductor.
8. The neural network according to claim 7 ,
wherein the first transistors are provided over a silicon substrate.
9. The neural network according to claim 7 , further comprising:
a second circuit comprising a second transistor,
wherein a channel formation region of the second transistor comprises silicon.