IP Library Granted Patent US 10,579,547
Granted Patent B2
US 10,579,547 · App. 16/235,605 · Granted Mar 3, 2020

Technologies for providing I/O channel abstraction for accelerator device kernels

Inventors: Susanne M. Balle (Hudson, NH); Evan Custudio (Seekonk, MA)
Assignee: Intel Corporation
G06F13/1615G06F13/1621G06F13/1652G06F13/404
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,579,547
App. No.
16/235,605
Granted
Mar 3, 2020
Kind
B2
Abstract

Technologies for providing I/O channel abstraction for accelerator device kernels include an accelerator device comprising circuitry to obtain availability data indicative of an availability of one or more accelerator device kernels in a system, including one or more physical communication paths to each accelerator device kernel. The circuitry is also configured to receive a request to establish a logical communication path between a kernel of the present accelerator device and another accelerator device kernel and establish, in response to the request and as a function of the obtained availability data, the logical communication path between the kernel of the present accelerator device and the other accelerator device kernel.

Claims (41)

1. An accelerator device comprising:

circuitry to:

obtain availability data indicative of an availability of one or more accelerator device kernels in a system, including one or more physical communication paths to each accelerator device kernel;

receive a request to establish a logical communication path between a kernel of the accelerator device and another accelerator device kernel; and

establish, in response to the request and as a function of the obtained availability data, the logical communication path between the kernel of the accelerator device and the other accelerator device kernel.

2. The accelerator device of claim 1 , wherein to establish the logical communication path comprises to:

determine a latency associated with each of multiple physical communication paths between the kernel of the accelerator device and the other accelerator device kernel; and

select, as the logical communication path, the physical communication path associated with the lowest determined latency.

3. The accelerator device of claim 1 , wherein to establish the logical communication path comprises to:

determine, for each of multiple physical communication paths between the kernel of the accelerator device and the other accelerator device kernel, a number of intermediary devices along the physical communication path; and

select, as the logical communication path, the physical communication path associated with the lowest determined number of intermediary devices.

4. The accelerator device of claim 1 , wherein to establish the logical communication path comprises to:

determine, for each of multiple physical communication paths between the kernel of the accelerator device and the other accelerator device kernel, an amount of congestion on the physical communication path; and

select, as the logical communication path, the physical communication path associated with the lowest determined amount of congestion.

5. The accelerator device of claim 1 , wherein to establish the logical communication path comprises to allocate multiple physical communication paths between the kernel of the accelerator device and the other accelerator device kernel to the logical communication path.

6. The accelerator device of claim 1 , wherein to establish the logical communication path comprises to allocate, as a function of a quality of service parameter associated with the kernel of the accelerator device, a portion of a total amount of communication capacity of the physical communication path to the logical communication path for use by the kernel of the accelerator device.

7. The accelerator device of claim 1 , wherein to establish the logical communication path comprises to reroute the logical communication path as a function of updated availability data.

8. The accelerator device of claim 1 , wherein to establish the logical communication path comprises to send data indicative of the established logical communication path to the other accelerator device kernel.

9. The accelerator device of claim 1 , wherein the circuitry is further to communicate data between the kernel of the accelerator device and the other accelerator device kernel with the established logical communication path.

10. The accelerator device of claim 9 , wherein to communicate data comprises to add a header to a packet, wherein the header includes data indicative of the established logical communication path.

11. The accelerator device of claim 9 , wherein to communicate data comprises to remove a header from a packet received by the accelerator device, wherein the header includes data indicative of the established logical communication path.

12. The accelerator device of claim 9 , wherein to communicate data comprises to utilize multiple I/O ports or network interface controllers associated with the accelerator device for the established logical communication path.

13. The accelerator device of claim 1 , wherein to establish the logical communication path comprises to establish a logical communication path with each of multiple other accelerator device kernels.

14. The accelerator device of claim 1 , wherein to obtain availability data comprises to obtain data indicative of a present capacity of each accelerator device, data indicative of a location of each accelerator device, or data indicative of types of available accelerator device kernels.

15. The accelerator device of claim 1 , wherein to obtain availability data comprises to obtain the availability data from another accelerator device or from a telemetry service device.

16. One or more non-transitory machine-readable storage media comprising a plurality of instructions stored thereon that, in response to being executed, cause an accelerator device to:

obtain availability data indicative of an availability of one or more accelerator device kernels in a system, including one or more physical communication paths to each accelerator device kernel;

receive a request to establish a logical communication path between a kernel of the accelerator device and another accelerator device kernel; and

establish, in response to the request and as a function of the obtained availability data, the logical communication path between the kernel of the accelerator device and the other accelerator device kernel.

17. The one or more non-transitory machine-readable storage media of claim 16 , wherein to establish the logical communication path comprises to:

determine a latency associated with each of multiple physical communication paths between the kernel of the accelerator device and the other accelerator device kernel; and

select, as the logical communication path, the physical communication path associated with the lowest determined latency.

18. The one or more non-transitory machine-readable storage media of claim 16 , wherein to establish the logical communication path comprises to:

determine, for each of a multiple physical communication paths between the kernel of the accelerator device and the other accelerator device kernel, a number of intermediary devices along the physical communication path; and

select, as the logical communication path, the physical communication path associated with the lowest determined number of intermediary devices.

19. A method comprising:

obtaining, by an accelerator device, availability data indicative of an availability of one or more accelerator device kernels in a system, including one or more physical communication paths to each accelerator device kernel;

receiving, by an accelerator device, a request to establish a logical communication path between a kernel of the accelerator device and another accelerator device kernel; and establishing, by the accelerator device and in response to the request and as a function of the obtained availability data, the logical communication path between the kernel of the accelerator device and the other accelerator device kernel.

20. The method of claim 19 , wherein establishing the logical communication path comprises:

determining a latency associated with each of multiple physical communication paths between the kernel of the accelerator device and the other accelerator device kernel; and

selecting, as the logical communication path, the physical communication path associated with the lowest determined latency.

Assignments (3)
SECURITY INTEREST Recorded Sep 12, 2025
From: ALTERA CORPORATION
To: BARCLAYS BANK PLC, AS COLLATERAL AGENT
Reel/Frame 073431/0309 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 9, 2025
From: INTEL CORPORATION
To: ALTERA CORPORATION
Reel/Frame 072704/0307 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 3, 2019
From: BALLE, SUSANNE M.; CUSTODIO, EVAN
To: INTEL CORPORATION
Reel/Frame 047893/0662 →
Cited By (1)
US 12,223,371