Large channel interconnects with through silicon Vias (TSVs) and method for constructing the same

1. A method for forming an electrical device comprising:

creating a plurality of columns of unitary electrical communication and spacer structures including an electrically conductive core material attached to a handler structure, the electrically conductive core material being the only metal layer of the unitary electrical communication and spacer structures, wherein an air gap is present separating adjacently positioned columns of unitary electrical communication and spacer structures of said plurality of columns;

attaching first ends of the plurality of columns to a first active wafer;

releasing the handler structure from the columns; and

attaching at least one second active wafer to second ends of the plurality of columns, wherein a dielectric epoxy based sealant is between the second active wafer and an outer layer of the plurality of columns of unitary electrical communication and spacer structures so that the dielectric epoxy based sealant is in direct contact with both the second active wafer and the outer layer of the plurality of columns of unitary electrical communication and spacer structures, wherein coolant passages housing liquid coolant are formed between the plurality of columns and the first active wafer and the at least one second active wafer, and the plurality of columns of unitary electrical communication and spacer structures further comprising semiconductor material sidewalls having a substantially conformal width that is substantially the same for each of the plurality of unitary electrical communication and spacer structures that is encircling the electrically conductive material core, and a solid dielectric layer having a substantially same width as a diameter of the electrically conductive material core between and in direct contact with both the electrically conductive material core and the semiconductor material sidewalls, the at least one unitary electrical communication and spacer structure being separate from and engaged to the adjacently stacked first and second active wafers.

2. The method of claim 1 , further comprising:

creating at least one other set of a plurality of columns of unitary electrical communication and spacer structures including an electrically conductive core material attached to another handler structure.

3. The method of claim 2 , further comprising:

attaching first ends of the at least one other set of the plurality of columns to a first active wafer;

releasing said another handler structure from the at least one other set of the plurality of columns; and

attaching at least one other active wafer to second ends of the at least one other set of plurality of columns, whereby another set of coolant passages are formed between the at least one other set of the plurality of columns and the second active wafer and said at least one other active wafer.

4. The method of claim 1 , wherein creating the plurality of columns of unitary electrical communication and spacer structures comprises forming a plurality of through silicon via (TSV) structures in a sacrificial substrate; and removing material from the sacrificial substrate between adjacent TSV structures in the plurality of TSV structures.

5. The method of claim 4 , wherein at least one of the plurality of columns of unitary electrical communication and spacer structures comprises a plurality of unitary electrical communication and spacer structures.

6. The method of claim 5 , wherein each of the unitary electrical communication and spacer structures includes a substrate material outer layer, wherein the substrate material outer layer is a remaining portion of the sacrificial substrate.

7. The method of claim 1 , wherein the liquid coolant is a dielectric or non-dielectric coolant.

8. The method of claim 1 , wherein the electrically conductive core material is formed to electrically communicate with at least one through silicon via structure in a wafer.

9. The method of claim 8 , wherein the at least one through silicon via structure connects to a set of adjacently stacked active wafers.

10. A method for forming an electrical device comprising:

creating a plurality of columns of unitary electrical communication and spacer structures including an electrically conductive core material attached to a handler structure, the electrically conductive core material being the only metal layer of the unitary electrical communication and spacer structures, wherein an air gap is present separating adjacently positioned columns of unitary electrical communication and spacer structures of said plurality of columns;

attaching first ends of the plurality of columns to a first active wafer;

releasing the handler structure from the columns;

attaching at least one second active wafer to second ends of the plurality of columns, wherein coolant passages housing liquid coolant are formed between the plurality of columns and the first active wafer and the at least one second active wafer, wherein a dielectric epoxy based sealant is between the second active wafer and an outer layer of the plurality of columns of unitary electrical communication and spacer structures so that the dielectric epoxy based sealant is in direct contact with both the second active wafer and the outer layer of the plurality of columns of unitary electrical communication and spacer structures, and the plurality of columns of unitary electrical communication and spacer structures further comprising semiconductor material sidewalls having a substantially conformal width that is substantially the same for each of the plurality of unitary electrical communication and spacer structures that is encircling the electrically conductive material core, and a solid dielectric layer having a substantially same width as a diameter of the electrically conductive material core between and in direct contact with both the electrically conductive material core and the semiconductor material sidewalls, the at least one unitary electrical communication and spacer structure being separate from and engaged to the adjacently stacked first and second active wafers; and

creating at least one other set of a plurality of columns of unitary electrical communication and spacer structures including an electrically conductive core material attached to another handler structure.

11. The method of claim 10 , further comprising:

attaching first ends of the at least one other set of the plurality of columns to a first active wafer;

releasing said another handler structure from the at least one other set of the plurality of columns; and

attaching at least one other active wafer to second ends of the at least one other set of plurality of columns, whereby another set of coolant passages are formed between the at least one other set of the plurality of columns and the second active wafer and said at least one other active wafer.

12. The method of claim 10 , wherein creating the plurality of columns of unitary electrical communication and spacer structures comprises forming a plurality of through silicon via (TSV) structures in a sacrificial substrate; and removing material from the sacrificial substrate between adjacent TSV structures in the plurality of TSV structures.

13. The method of claim 12 , wherein each of the unitary electrical communication and spacer structures includes a substrate material outer layer, wherein the substrate material outer layer is a remaining portion of the sacrificial substrate.

14. The method of claim 10 , wherein attaching the first ends of the plurality of columns to the first active wafer comprises bonding through a solder or polymeric material.

15. The method of claim 10 , wherein attaching the at least one second active wafer to second ends of the plurality of columns comprises bonding through a solder or polymeric material.

16. The method of claim 10 , wherein the liquid coolant is a dielectric or non-dielectric coolant.

17. The method of claim 16 , wherein at least one through silicon via structure connects to a set of adjacently stacked active wafers.

18. The method of claim 10 , wherein the electrically conductive core material is formed to electrically communicate with at least one through silicon via structure in a wafer.