Semiconductor package and method of manufacturing the same
Provided are a semiconductor package and a method of manufacturing the same, the semiconductor package including an interconnection part including an insulation layer and an interconnection layer, a semiconductor chip disposed on the interconnection part and electrically connected to the interconnection layer through a bonding pad, and an EMI shielding part connected to the interconnection layer while covering the semiconductor chip and the interconnection part.
1. A semiconductor package comprising:
an interconnection part including an insulating layer and an interconnection layer;
a semiconductor chip provided on the interconnection part and electrically connected to the interconnection layer through a bonding pad;
a frame provided on the interconnection part and provided with an accommodation part in which the semiconductor chip is disposed; and
an electromagnetic interference (EMI) shielding part configured to cover lateral surfaces of the semiconductor chip and the accommodation part and provided with an exposing part exposed to an outside;
a first frame provided on the interconnection part, provided with a first accommodation part in which the semiconductor chip is disposed, and formed of a metal frame; and
a second frame provided on the first frame while covering the first frame, provided with a second accommodation part in which the semiconductor chip is disposed, and formed of an insulating frame.
2. The semiconductor package of claim 1 , wherein the interconnection part includes:
a redistribution layer connected to the bonding pad of the semiconductor chip;
a first insulating layer disposed between the semiconductor chip and the redistribution layer; and
a second insulating layer disposed at a lower side of the redistribution layer,
wherein the first frame is connected to the redistribution layer through a first opening formed through the first insulating layer.
3. The semiconductor package of claim 2 , wherein the EMI shielding part is connected to the redistribution layer through a second opening formed through the first insulating layer.
4. The semiconductor package of claim 3 , further comprising a packing material formed on the EMI shielding part to seal the semiconductor chip.
5. The semiconductor package of claim 4 , further comprising an external connection terminal electrically connected to the redistribution layer.
6. A semiconductor package comprising:
an interconnection part including an insulating layer and an interconnection layer;
a semiconductor chip provided on the interconnection part and electrically connected to the interconnection layer through a bonding pad;
a frame provided on the interconnection part and provided with an accommodation part in which the semiconductor chip is disposed;
an electromagnetic interference (EMI) shielding part configured to cover lateral surfaces of the semiconductor chip and the accommodation part and provided with an exposing part exposed to an outside;
a space part formed by the lateral surface of the semiconductor chip and the EMI shielding part disposed to be spaced apart from each other; and
an insulating frame provided with an accommodation part in which the semiconductor chip, the EMI shielding part, and the space part are disposed.
7. The semiconductor package of claim 6 , wherein the interconnection part includes:
a redistribution layer connected to the bonding pad of the semiconductor chip;
a first insulating layer disposed between the semiconductor chip and the redistribution layer, and provided with a protrusion extending along a circumference of the lateral surface of the semiconductor chip and inserted into the space part; and
a second insulating layer disposed at a lower side of the redistribution layer.
8. The semiconductor package of claim 7 , wherein the EMI shielding part is connected to the redistribution layer through an opening formed through the first insulating layer.
9. The semiconductor package of claim 8 , further comprising an adhesive layer provided between the semiconductor chip and the EMI shielding part.
10. The semiconductor package of claim 9 , further comprising a primer part provided between the EMI shielding part and the insulating frame.
11. The semiconductor package of claim 10 , further comprising an external connection terminal electrically connected to the redistribution layer.