IP Library Granted Patent US 10,726,351
Granted Patent B1
US 10,726,351 · App. 16/265,867 · Granted Jul 28, 2020

System and method for controlling superconducting qubits using single flux quantum logic

Inventors: Kangbo Li (Madison, WI); Robert Francis McDermott, III (Madison, WI); Maxim George Vavilov (Middleton, WI)
Assignee: Wisconsin Alumni Research Foundation
G06N10/00B82Y10/00H03K19/1958
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Quick Facts
Patent No.
US 10,726,351
App. No.
16/265,867
Granted
Jul 28, 2020
Kind
B1
Abstract

A system and method for controlling superconducting qubits is provided. In some aspects the method includes assembling, using a controller of a quantum computing system, a pulse subsequence that comprises pairs of voltage pulses timed symmetrically with respect to a period corresponding to a qubit frequency of a superconducting qubit in the quantum computing system. The method also includes generating, using the controller, a pulse sequence using a repetition of a pulse subsequence. The method further includes controlling the superconducting qubit by applying the pulse sequence to the superconducting qubit using a single flux quantum (“SFQ”) driver coupled thereto.

Claims (21)

1. A quantum computing system comprising:

a qubit architecture comprising a superconducting qubit described by a qubit frequency; and

a single flux quantum (“SFQ”) driver coupled to the superconducting qubit,

wherein the SFQ driver is configured to provide a pulse sequence to control the superconducting qubit, the pulse sequence being generated using a repetition of a pulse subsequence that comprises pairs of voltage pulses timed symmetrically with respect to a period corresponding to the qubit frequency.

2. The system of claim 1 , wherein the superconducting qubit comprises a transmon qubit.

3. The system of claim 1 , wherein the at least one transmon qubit is capacitively coupled to the SFQ driver.

4. The system of claim 1 , wherein the system further comprises a controller configured to direct the SFQ driver to provide the pulse sequence to the superconducting qubit in the qubit architecture.

5. The system of claim 4 , wherein the controller is further configured to assemble the pulse subsequence using approximately between 30 and 60 classical bits.

6. The system of claim 4 , wherein the controller is further configured to assemble the pulse subsequence to perform a gate on the superconducting qubit.

7. The system of claim 4 , wherein the controller is further configured to optimize the pulse subsequence to minimize leakage from a computational subspace of the superconducting qubit.

8. The system of claim 4 , wherein the controller is further configured to control multiple qubits in the qubit architecture using the SFQ driver by assembling the pulse subsequence to satisfy a frequency matching condition.

9. A method for controlling superconducting qubits, the method comprising:

assembling, using a controller of a quantum computing system, a pulse subsequence that comprises pairs of voltage pulses timed symmetrically with respect to a period corresponding to a qubit frequency of a superconducting qubit in the quantum computing system;

generating, using the controller, a pulse sequence using a repetition of a pulse subsequence; and

controlling the superconducting qubit by applying the pulse sequence to the superconducting qubit using a single flux quantum (“SFQ”) driver coupled thereto.

10. The method of claim 9 , wherein the method further comprises controlling at least one transmon qubit that is capacitively coupled to the SFQ driver.

11. The method of claim 9 , wherein the method further comprises assembling the pulse subsequence using approximately between 30 and 60 classical bits.

12. The method of claim 9 , wherein the method further comprises assembling the pulse subsequence to perform a gate on the superconducting qubit.

13. The method of claim 9 , wherein the method further comprises optimizing the pulse subsequence to minimize leakage from a computational subspace of the superconducting qubit.

14. The method of claim 9 , wherein the method further comprises controlling multiple qubits in the qubit architecture of the quantum computing system using an SFQ driver coupled thereto.

15. The method of claim 14 , wherein the method further comprises tuning the qubit frequency for selected qubits such that a gate time associated with the pulse sequence corresponds to both an integer number of SFQ clock cycles and an integer number of qubit cycles.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 22, 2020
From: VAVILOV, MAXIM; MCDERMOTT, ROBERT; LI, KANGBO
To: WISCONSIN ALUMNI RESEARCH FOUNDATION
Reel/Frame 052463/0768 →
CONFIRMATORY LICENSE Recorded Mar 1, 2019
From: UNIVERSITY OF WISCONSIN, MADISON
To: NATIONAL SCIENCE FOUNDATION
Reel/Frame 048482/0611 →
Cited By (7)
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