Modulating the microstructure of metallic interconnect structures
Tooling apparatus and methods are provided to fabricate semiconductor devices in which controlled thermal annealing techniques are utilized to modulate microstructures of metallic interconnect structures. For example, an apparatus includes a single platform semiconductor processing chamber having first and second sub-chambers. The first sub-chamber is configured to receive a semiconductor substrate comprising a metallization layer formed on a dielectric layer, wherein a portion of the metallization layer is disposed within an opening etched in the dielectric layer, and to form a stress control layer on the metallization layer. The second sub-chamber comprises a programmable hot plate which is configured to perform a thermal anneal process to modulate a microstructure of the metallization layer while the stress control layer is disposed on the metallization layer, and without an air break between the process modules of forming the stress control layer and performing the thermal anneal process.
1. A method, comprising:
forming a dielectric layer on a substrate;
patterning the dielectric layer to form an opening in the dielectric layer;
depositing a layer of metallic material on the dielectric layer to fill the opening with metallic material;
forming a stress control layer on the layer of metallic material; and
performing a thermal anneal process to modulate a microstructure of the deposited layer of metallic material from a first microstructure to a second microstructure while the stress control layer is disposed on the layer of metallic material;
wherein the thermal anneal process is performed using a programmable hot plate which is programmed to perform a controlled thermal anneal cycle with active heating and active cooling periods; and
wherein the thermal anneal process is performed without an air break between the steps of forming the stress control layer and performing the thermal anneal process.
2. The method of claim 1 , wherein the controlled thermal anneal cycle is performed over a period of time ranging from about 30 seconds to about 5 hours.
3. The method of claim 1 , wherein the controlled thermal anneal cycle is performed over a temperature setting of the programmable hot plate from about 0 degrees Celsius to about 800 degrees Celsius.
4. The method of claim 1 , wherein the controlled thermal anneal cycle comprises at least one ramp-up heating period in which a temperature setting of the programmable hot plate increases at a rate of about 10 degrees Celsius per minute, or greater.
5. The method of claim 1 , wherein the controlled thermal anneal cycle comprises at least one ramp-down cooling period in which a temperature setting of the programmable hot plate decreases at a rate of about 2 degrees Celsius per minute or greater.
6. The method of claim 1 , wherein the controlled thermal anneal cycle comprises at least one soaking period in which a temperature setting of the programmable hot plate is maintained constant for a period of time at a temperature level which is below a critical temperature of the layer of metallic material at which stress relaxation of the metallic material occurs during a heating period of the controlled thermal anneal cycle.
7. The method of claim 1 , wherein the controlled thermal anneal cycle is performed in a gas atmosphere which comprises at least one of nitrogen, hydrogen, and helium.
8. The method of claim 1 , wherein the stress control layer comprises at least one of tantalum, tantalum nitride, titanium, titanium nitride, tungsten, tungsten nitride, cobalt, cobalt tungsten phosphide, ruthenium, ruthenium nitride, ruthenium, ruthenium nitride, iridium, rhodium, manganese, nickel, and alloys of such materials.
9. The method of claim 1 , wherein the layer of metallic material comprises at least one of copper, aluminum, tungsten, cobalt, ruthenium, iridium, rhodium, nickel, and alloys of such materials.
10. The method of claim 1 , comprising performing a wet deposition process to form the stress control layer on the layer of metallic material.
11. The method of claim 1 , comprising performing a dry deposition process to form the stress control layer on the layer of metallic material.
12. The method of claim 1 , further comprising performing a furnace thermal anneal process to reflow the layer of metallic material prior to forming the stress control layer on the reflowed layer of metallic material.
13. The method of claim 1 , wherein the first microstructure comprises a polycrystalline microstructure and wherein the second microstructure comprises an average grain size which is greater than an average grain size of the polycrystalline microstructure.
14. The method of claim 1 , wherein the dielectric layer comprises an interlevel dielectric layer of a back-end-of-line structure formed on the semiconductor substrate.
15. A method, comprising:
forming wafer comprising a dielectric layer formed on an upper surface of a wafer substrate, wherein the dielectric layer comprises an opening etched in a surface of the dielectric layer;
inputting the wafer into a single platform semiconductor processing chamber which is configured to process the wafer, the single platform semiconductor processing chamber comprising a first sub-chamber, a second sub-chamber, and a third sub-chamber;
depositing a layer of metallic material to fill the opening and cover the surface of the dielectric layer with the metallic material, in the first sub-chamber;
depositing a stress control layer on the layer of metallic material, in the second sub-chamber; and
performing a thermal anneal process in the third sub-chamber using a programmable hot plate to modulate a microstructure of the layer of metallic material from a first microstructure to a second microstructure while the stress control layer is disposed on the layer of metallic material, wherein the programmable hot plate is programmed to perform a controlled thermal anneal cycle with active heating and active cooling stages;
wherein the thermal anneal process is performed without an air break between the steps of depositing the stress control layer and performing the thermal anneal process.
16. The method of claim 15 , further comprising performing a furnace thermal anneal process in a fourth sub-chamber of the single platform semiconductor processing chamber, wherein the furnace thermal anneal process is performed to reflow the layer of metallic material prior to depositing the stress control layer on the reflowed layer of metallic material in the second sub-chamber.
17. The method of claim 15 , wherein the controlled thermal anneal cycle is performed over a period of time ranging from about 30 seconds to about 5 hours.
18. The method of claim 15 , wherein the controlled thermal anneal cycle is performed over a temperature setting of the programmable hot plate from about 0 degrees Celsius to about 800 degrees Celsius.
19. The method of claim 15 , wherein the controlled thermal anneal cycle comprises:
at least one ramp-up heating period in which a temperature setting of the programmable hot plate increases at a rate of about 10 degrees Celsius per minute, or greater;
at least one ramp-down cooling period in which a temperature setting of the programmable hot plate decreases at a rate of about 2 degrees Celsius per minute, or greater; and
at least one soaking period in which a temperature setting of the programmable hot plate is maintained constant for a period of time at a temperature level which is below a critical temperature of the layer of metallic material at which stress relaxation of the metallic material occurs during a heating period of the controlled thermal anneal cycle.
20. The method of claim 15 , wherein:
the stress control layer comprises at least one of tantalum, tantalum nitride, titanium, titanium nitride, tungsten, tungsten nitride, cobalt, cobalt tungsten phosphide, ruthenium, ruthenium nitride, ruthenium, ruthenium nitride, iridium, rhodium, manganese, nickel, and alloys of such materials; and
the layer of metallic material comprises at least one of copper, aluminum, tungsten, cobalt, ruthenium, iridium, rhodium, nickel, and alloys of such materials.