Solid-state imaging device, manufacturing method of solid-state imaging device, and electronic apparatus
There is provided a solid-state imaging device including a first substrate having a pixel circuit including a pixel array unit formed thereon, and a second substrate having a plurality of signal processing circuits formed thereon so as to be arranged through a scribe region. The first substrate and the second substrate are stacked.
1. A light detecting device, comprising:
a first substrate including:
a first substrate layer at a light incident side, the first substrate layer including a plurality of photodiodes; and
a first wiring layer at a side opposite the light incident side, the first wiring layer including a plurality of pixel transistors;
a second substrate including a second wiring layer and a second substrate layer,
wherein the first substrate and the second substrate are bonded together such that the first wiring layer and the second wiring layer are facing each other; and
a third substrate including a third wiring layer and a third substrate layer,
wherein the first substrate and the third substrate are bonded together such that the first wiring layer and the third wiring layer are facing each other,
wherein the first wiring layer and the second wiring layer are electrically connected to one another and the first wiring layer and the third wiring layer are electrically connected to one another, and
wherein a size of the second substrate and a size of the third substrate are each smaller than a size of the first substrate.
2. The light detecting device according to claim 1 , wherein the first wiring layer and the second wiring layer are electrically connected by a via.
3. The light detecting device according to claim 1 , further comprising a spacing region provided between the second substrate and the third substrate.
4. The light detecting device according to claim 1 , wherein the second substrate includes a first signal processing circuit and the third substrate includes a second signal processing circuit.
5. The light detecting device according to claim 4 , wherein a signal from the first signal processing circuit is conveyed to the second signal processing circuit and a result of a signal processing on the signal from the second signal processing circuit is output as an image signal.
6. The light detecting device according to claim 5 , wherein the first signal processing circuit includes an analog to digital converter and the second signal processing circuit includes a memory.
7. The light detecting device according to claim 4 , wherein the second substrate includes a guard ring.
8. The light detecting device according to claim 7 , wherein the guard ring surrounds a part of a periphery of the first signal processing circuit.
9. The light detecting device according to claim 8 , wherein a pixel array includes the plurality of photodiodes and a part of the guard ring is disposed under the pixel array.
10. The light detecting device according to claim 1 , wherein the second wiring layer and the third wiring layer are electrically connected via a metal disposed in the first wiring layer.
11. The light detecting device according to claim 1 , wherein the first substrate and the second substrate are directly bonded to each other.
12. The light detecting device according to claim 4 , wherein the second signal processing circuit is surrounded by a via that connects the second substrate and the first substrate.
13. An electronic apparatus, comprising:
a light detecting device, including:
a first substrate including:
a first substrate layer at a light incident side, the first substrate layer including a plurality of photodiodes; and
a first wiring layer at a side opposite the light incident side, the first wiring layer including a plurality of pixel transistors;
a second substrate including a second wiring layer and a second substrate layer,
wherein the first substrate and the second substrate are bonded together such that the first wiring layer and the second wiring layer are facing each other; and
a third substrate including a third wiring layer and a third substrate layer,
wherein the first substrate and the third substrate are bonded together such that the first wiring layer and the third wiring layer are facing each other,
wherein the first wiring layer and the second wiring layer are electrically connected to one another and the first wiring layer and the third wiring layer are electrically connected to one another, and
wherein a size of the second substrate and a size of the third substrate are each smaller than a size of the first substrate.