IP Library › Granted Patent US 11,016,763
Granted Patent B2
US 11,016,763 · App. 16/297,358 · Granted May 25, 2021

Implementing a micro-operation cache with compaction

Inventors: Jagadish B. Kotra (Austin, TX); John Kalamatianos (Arlington, MA)
Assignee: Advanced Micro Devices, Inc.
G06F9/223G06F9/3016G06F12/0875G06F2212/452
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,016,763
App. No.
16/297,358
Granted
May 25, 2021
Kind
B2
Abstract

Systems, apparatuses, and methods for compacting multiple groups of micro-operations into individual cache lines of a micro-operation cache are disclosed. A processor includes at least a decode unit and a micro-operation cache. When a new group of micro-operations is decoded and ready to be written to the micro-operation cache, the micro-operation cache determines which set is targeted by the new group of micro-operations. If there is a way in this set that can store the new group without evicting any existing group already stored in the way, then the new group is stored into the way with the existing group(s) of micro-operations. Metadata is then updated to indicate that the new group of micro-operations has been written to the way. Additionally, the micro-operation cache manages eviction and replacement policy at the granularity of micro-operation groups rather than at the granularity of cache lines.

Claims (78)

1. A processor, comprising:

a decode unit configured to decode instructions from an instruction stream into groups of micro-operations; and

a micro-operation cache configured to:

receive a first group of micro-operations from the decode unit;

identify a second group of micro-operations stored in a first cache line of the micro-operation cache;

determine whether a first condition exists, wherein the first condition comprises the first cache line of the micro-operation cache having room to store both the first group of micro-operations and the second group of micro-operations;

store the first group of micro-operations together with the second group of micro-operations in the first cache line of the micro-operation cache responsive to detecting the first condition; and

store the first group of micro-operations in a second cache line of the micro-operation cache responsive to not detecting the first condition.

2. The processor as recited in claim 1 , wherein the micro-operation cache is further configured to:

select a victim way from a set targeted by the first group of micro-operations responsive to receiving the first group of micro-operations;

evict all resident micro-operations from the victim way responsive to determining that the victim way is not compacted; and

evict a subset of a plurality of groups of micro-operations from the victim way responsive to determining that the victim way is compacted and responsive to determining the first group of micro-operations can fit in available space of the victim way after the subset is evicted.

3. The processor as recited in claim 2 , wherein the micro-operation cache is configured to select, as the subset to be evicted from the victim way, a minimum sized group in the victim way that can fit the first group of micro-operations.

4. The processor as recited in claim 1 , wherein storing the first group of micro-operations together with the second group of micro-operations in the first cache line comprises:

merging, within the first cache line, the first group of micro-operations together with the second group of micro-operations and immediate and/or displacement fields of the first group and the second group responsive to detecting the first condition;

storing a first offset indicating a starting location in the first cache line of micro-operations of the first group of micro-operations;

storing a second offset indicating a starting location in the first cache line of immediate and/or displacement fields of the second group of micro-operations; and

storing a third offset indicating a starting location in the first cache line of immediate and/or displacement fields of the first group of micro-operations.

5. The processor as recited in claim 1 , wherein the micro-operation cache is further configured to:

maintain metadata which indicates a number of groups of micro-operations stored in each cache line;

store a first indication in first metadata that the first cache line stores a plurality of micro-operation groups compacted together responsive to detecting the first condition; and

store a second indication in second metadata that the second cache line stores a single micro-operation group responsive to not detecting the first condition.

6. The processor as recited in claim 1 , wherein:

the first condition is comprises determining that the first group and the second group are able to fit into a single way of the micro-operation cache; and

responsive to detecting the first condition, the micro-operation cache is further configured to store immediate and/or displacement fields in the first cache line after micro-operations from the first group and the at least one existing group.

7. The processor as recited in claim 1 , wherein:

the micro-operation cache is further configured to maintain replacement policy metadata at a granularity of a micro-operation group; and

the processor further comprises an instruction cache configured to store the first group of micro-operations and at least one group of micro-operations together in a single cache line of the instruction cache responsive to the first cache line being evicted from the micro-operation cache.

8. A method, comprising:

decoding, by a decode unit, instructions from an instruction stream into groups of micro-operations;

receiving, by a micro-operation cache, a first group of micro-operations from the decode unit;

identifying a second group of micro-operations stored in a first cache line of the micro-operation cache;

determining whether a first condition exists, wherein the first condition comprises the first cache line of the micro-operation cache having room to store both the first group of micro-operations and the second group of micro-operations;

storing, by the micro-operation cache, the first group of micro-operations together with the second group of micro-operations in the first cache line of the micro-operation cache responsive to detecting the first condition; and

storing, by the micro-operation cache, the first group of micro-operations in a second cache line of the micro-operation cache responsive to not detecting the first condition.

9. The method as recited in claim 8 , further comprising:

selecting, based at least in part on criteria associated with compaction, a victim way from a set targeted by the first group of micro-operations responsive to receiving the first group of micro-operations;

evicting all resident micro-operations from the victim way responsive to determining that the victim way is not compacted; and

evicting a subset of a plurality of groups of micro-operations from the victim way responsive to determining that the victim way is compacted and responsive to determining the first group of micro-operations can fit in available space of the victim way after the subset is evicted.

10. The method as recited in claim 9 , further comprising selecting, as the subset to be evicted from the victim way, a minimum sized group in the victim way that can fit the first group of micro-operations.

11. The method as recited in claim 8 , wherein storing the first group of micro-operations together with the second group of micro-operations in the first cache line comprises:

merging, within the first cache line, the first group of micro-operations with at least a second group of micro-ops and one or more immediate and/or displacement fields of the first group and the second group responsive to detecting the first condition;

storing a first offset indicating a starting location in the first cache line of micro-operations of the first group of micro-operations;

storing a second offset indicating a starting location in the first cache line of immediate and/or displacement fields of the second group of micro-operations; and

storing a third offset indicating a starting location in the first cache line of immediate and/or displacement fields of the first group of micro-operations.

12. The method as recited in claim 8 , further comprising:

maintaining metadata which indicates a number of groups of micro-operations in each cache line;

storing a first indication in first metadata that the first cache line stores a plurality of micro-operation groups compacted together responsive to detecting the first condition; and

storing a second indication in second metadata that the second cache line stores a single micro-operation group responsive to not detecting the first condition.

13. The method as recited in claim 8 , further comprising storing immediate and/or displacement fields in the first cache line after micro-operations from the first group and at least one existing group.

14. The method as recited in claim 8 , further comprising:

maintaining replacement policy metadata at a granularity of a micro-operation group; and

storing the first group of micro-operations and the at least one group of micro-operations together in a single cache line of an instruction cache responsive to the first cache line being evicted from the micro-operation cache.

15. A system, comprising:

a memory; and

a processor, comprising a micro-operation cache, coupled to the memory;

wherein the processor is configured to:

decode instructions into micro-operations and send the micro-operations to the micro-operation cache;

determine whether a first condition exists, wherein the first condition comprises the first cache line of the micro-operation cache having room to store both the first group of micro-operations and the second group of micro-operations;

store, in a first cache line of the micro-operation cache, a first group of received micro-operations together with a second group of micro-operations that were previously stored in the first cache line of the micro-operation cache responsive to detecting the first condition; and

store the first group of micro-operations in a second cache line of the micro-operation cache responsive to not detecting the first condition.

16. The system as recited in claim 15 , wherein the processor is further configured to:

select a victim way from a set of the micro-operation cache targeted by the first group of micro-operations responsive to receiving the first group of micro-operations;

evict all resident micro-operations from the victim way responsive to determining that the victim way is not compacted; and

evict a subset of a plurality of groups of micro-operations from the victim way responsive to determining that the victim way is compacted and responsive to determining the first group of micro-operations can fit in available space of the victim way after the subset is evicted.

17. The system as recited in claim 16 , wherein the processor is configured to select, as the subset to be evicted from the victim way, a minimum sized group in the victim way that can fit the first group of micro-operations.

18. The system as recited in claim 15 , wherein storing the first group of micro-operations together with the second group of micro-operations in the first cache line comprises:

merging, within the first cache line, the first group of micro-operations and the second group of micro-operations and immediate and/or displacement fields of the first group and the second group responsive to detecting the first condition;

storing a first offset indicating a starting location in the first cache line of micro-operations of the first group of micro-operations;

storing a second offset indicating a starting location in the first cache line of immediate fields of the second group of micro-operations; and

storing a third offset indicating a starting location in the first cache line of immediate fields of the first group of micro-operations.

19. The system as recited in claim 15 , wherein the processor is further configured to:

maintain metadata which indicates a number of groups of micro-operations in each cache line of the micro-operation cache;

store a first indication in first metadata that the first cache line stores a plurality of micro-operation groups compacted together responsive to detecting the first condition; and

store a second indication in second metadata that the second cache line stores a single micro-operation group responsive to not detecting the first condition.

20. The system as recited in claim 15 , wherein:

the first condition comprises determining that the first group and the second group are able to fit into a single way of the micro-operation cache; and

responsive to detecting the first condition, the processor is further configured to store immediate and/or displacement fields in the first cache line after micro-operations from the first group and the at least one other group.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 8, 2019
From: KOTRA, JAGADISH B.; KALAMATIANOS, JOHN
To: ADVANCED MICRO DEVICES, INC.
Reel/Frame 048552/0153 →
Continuity (1)
Related Publication 20200285466A1 · Sep 10, 2020
Cited By (2)
US 12,360,765 US 12,373,207