IP Library Granted Patent US 10,831,447
Granted Patent B2
US 10,831,447 · App. 16/325,003 · Granted Nov 10, 2020

Multiply-accumulate operation device

Inventors: Takashi Morie (Fukuoka, JP); Quan Wang (Fukuoka, JP); Hakaru Tamukoh (Fukuoka, JP)
Assignee: Sony Corporation
G06F7/5443G06N3/049G06N3/0481G06N3/0635
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Quick Facts
Patent No.
US 10,831,447
App. No.
16/325,003
Granted
Nov 10, 2020
Kind
B2
Abstract

Electric charges depending on values of N + electric signals and values of corresponding positive loads are held in first capture-and-storage circuitry. Electric charges having a size depending on values of (N−N + ) electric signals and corresponding absolute values of negative loads are held in second capture-and-storage circuitry. A sum of N + multiplied values obtained by multiplying each of the positive loads by each of the values of the N + electric signals is calculated when a voltage held in the first capture-and-storage circuitry reaches a first threshold. A sum of (N−N + ) multiplied values obtained by multiplying each of the absolute values by each of the values of the (N−N + ) electric signals is calculated when a voltage held in the second capture-and-storage circuitry reaches a second threshold A sum of N multiplied values is obtained by subtracting the sum of (N−N + ) multiplied values from the sum of N + multiplied values.

Claims (20)

1. A multiply-accumulate operation device performs a series of processing by using an analog circuit, the series of processing including causing each of N electric signals being given to correspond to each of loads, multiplying each of values of the electric signals by each of values of the loads corresponding to the electric signals to obtain N multiplied values, and deriving a sum of the N multiplied values,

the analog circuit including

N + first output means that cause each of N + electric signals being given in a predetermined period T 1 to correspond to each of positive loads and output electric charges respectively, each of the electric charges having a size depending on each of values of the electric signals and each of values of the positive loads corresponding to the electric signals,

a first capture-and-storage means to which the N + first output means are connected in parallel and in which the electric charges output from each of the N first output means are stored,

(N−N + ) second output means that cause each of (N−N + ) electric signals being given in the period T 1 to correspond to each of absolute values of negative loads and output electric charges respectively, each of the electric charges having a size depending on each of values of the electric signals and each of the absolute values of the negative loads corresponding to the electric signals,

a second capture-and-storage means to which the (N−N + ) second output means are connected in parallel and in which the electric charges output from each of the (N−N + ) second output means are stored, and

a multiply-accumulate deriving means calculating a first multiply-accumulate value when detecting that a voltage held in the first capture-and-storage means reaches a preset first threshold, calculating a second multiply-accumulate value when detecting that a voltage held in the second capture-and-storage means reaches a preset second threshold, and obtaining the sum of the N multiplied values by subtracting the second multiply-accumulate value from the first multiply-accumulate value, the first multiply-accumulate value being a sum of N + multiplied values obtained by multiplying each of the positive loads corresponding to the N + electric signals by each of the values of the N + electric signals respectively, the second multiply-accumulate value being a sum of (N−N + ) multiplied values obtained by multiplying each of the absolute values of the negative loads corresponding to the (N−N + ) electric signals by each of the values of the (N−N + ) electric signals respectively,

characterized in that

the first threshold has a size proportional to a product of a sum of the N + positive loads and a length of the period T 1 ,

the second threshold has a size proportional to a product of a sum of the absolute values of the (N−N + ) negative loads and the length of the period T 1 , and

the multiply-accumulate operation device derives the first multiply-accumulate value and the second multiply-accumulate value in a period T 2 having the same length as the length of the period T 1 after the period T 1 ,

wherein the N is a natural number that is two or more, and the N + is a natural number that is the N or less.

2. The multiply-accumulate operation device according to claim 1 , characterized in that the multiply-accumulate operation device

adds a dummy load to a smaller one of the sum of the N + positive loads or the sum of the absolute values of the (N−N + ) negative loads, the dummy load corresponding to a virtual electric signal having a value 0, and being a number obtained by multiplying −1 by a difference of the sum of the N + positive loads and the sum of the absolute values of the (N−N + ) negative loads,

makes the sum of the N + positive loads be equal to the sum of the absolute values of the (N−N + ) negative loads, and

obtains the sum of the N multiplied values on a basis of a difference of a first timing at which the voltage held in the first capture-and-storage means reaches the first threshold and a second timing at which the voltage held in the second capture-and-storage means reaches the second threshold.

3. The multiply-accumulate operation device according to claim 2 , characterized in that

a plurality of the analog circuits are hierarchically connected via switch mechanisms,

each of the switch mechanisms transmits the sum of the N multiplied values that each of the analog circuits in a lower layer obtains to each of the analog circuits in an upper layer in a case that the first timing is the same as the second timing, or, in a case that the first timing is earlier than the second timing, and

each of the switch mechanisms transmits the value 0 to each of the analog circuits in the upper layer in a case that the first timing is later than the second timing.

Assignments (4)
CHANGE OF NAME Recorded Apr 20, 2022
From: SONY CORPORATION
To: SONY GROUP CORPORATION
Reel/Frame 059707/0101 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 22, 2019
From: WANG, QUAN
To: SONY CORPORATION
Reel/Frame 048416/0836 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 19, 2019
From: MORIE, TAKASHI
To: SONY CORPORATION
Reel/Frame 048371/0926 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 14, 2019
From: TAMUKOH, HAKARU
To: SONY CORPORATION
Reel/Frame 048336/0290 →
Priority Claims (1)
JP 2016-161182 · Aug 19, 2016 · national
Continuity (1)
Related Publication 20190171418A1 · Jun 6, 2019
Cited By (1)
US 12,657,005