IP Library › Granted Patent US 11,232,980
Granted Patent B2
US 11,232,980 · App. 16/346,256 · Granted Jan 25, 2022

Bottom-up fill dielectric materials for semiconductor structure fabrication and their methods of fabrication

Inventors: Florian Gstrein (Portland, OR); Rami Hourani (Portland, OR); Gopinath Bhimarasetti (Portland, OR); James M. Blackwell (Portland, OR)
Assignee: Intel Corporation
H01L21/76837H01L21/0337H01L21/3086H01L21/76811H01L21/76813H01L21/76816H01L21/76831H01L21/76834H01L21/76897H01L23/528H01L21/0228H01L21/02252H01L21/76883H01L23/5226
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Quick Facts
Patent No.
US 11,232,980
App. No.
16/346,256
Granted
Jan 25, 2022
Kind
B2
Abstract

Bottom-up fill dielectric materials for semiconductor structure fabrication, and methods of fabricating bottom-up fill dielectric materials for semiconductor structure fabrication, are described. In an example, a method of fabricating a dielectric material for semiconductor structure fabrication includes forming a trench in a material layer above a substrate. A blocking layer is formed partially into the trench along upper portions of sidewalls of the trench. A dielectric layer is formed filling a bottom portion of the trench with a dielectric material up to the blocking layer. The blocking layer is removed. The forming the blocking layer, the forming the dielectric layer, and the removing the blocking layer are repeated until the trench is completely filled with the dielectric material.

Claims (10)

1. An interconnect structure for an integrated circuit, the interconnect structure comprising:

a first layer of the interconnect structure disposed above a substrate, the first layer comprising a first grating of alternating metal lines and dielectric lines in a first direction, wherein the dielectric lines of the first grating have an uppermost surface higher than an uppermost surface of the metal lines of the first grating;

a second layer of the interconnect structure disposed above the first layer of the interconnect structure, the second layer comprising a second grating of alternating metal lines and dielectric lines in a second direction, perpendicular to the first direction, wherein the dielectric lines of the second grating have a lowermost surface lower than a lowermost surface of the metal lines of the second grating, wherein the dielectric lines of the second grating overlap and contact, but are distinct from, the dielectric lines of the first grating; and

a region of dielectric material disposed between a metal line of the metal lines of the first grating and a metal line of the metal lines of the second grating, and in a same plane as upper portions of the dielectric lines of the first grating and lower portions of the dielectric lines of the second grating, the region of dielectric material comprising a bottom-up fill dielectric material and a blocking layer, the blocking layer separate and distinct from the bottom-up fill dielectric material, and the blocking layer comprising a material different than the bottom-up fill dielectric material.

2. The interconnect structure of claim 1 , wherein the bottom-up fill dielectric material comprises a void trapped therein.

3. The interconnect structure of claim 1 , wherein the blocking layer comprises an aliphatic hydrocarbon having a head group.

4. The interconnect structure of claim 1 , wherein the bottom-up fill dielectric material comprises a metal oxide.

5. The interconnect structure of claim 1 , further comprising:

a conductive via disposed between and coupling a metal line of the first grating to a metal line of the second grating, the conductive via in the same plane as the region of dielectric material.

6. The interconnect structure of claim 1 , wherein the dielectric lines of the first grating comprise a first dielectric material, and the dielectric lines of the second grating comprise a second, different, dielectric material, and wherein the first dielectric material and the second, different, dielectric material are different in composition than the region of dielectric material.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 8, 2021
From: GSTREIN, FLORIAN; HOURANI, RAMI; BHIMARASETTI, GOPINATH; BLACKWELL, JAMES M.
To: INTEL CORPORATION
Reel/Frame 058340/0412 →
Continuity (1)
Related Publication 20190267282A1 · Aug 29, 2019