Vertical stacked nanosheet CMOS transistors with different work function metals
A method for forming a semiconductor device includes forming a structure having at least a first nanosheet stack for a first device, a second nanosheet stack for a second device and disposed over the first nanosheet stack, a disposable gate structure, and a gate spacer. The disposable gate structure and sacrificial layers of the first and second nanosheet stacks are removed thereby forming a plurality of cavities. A conformal gate dielectric layer is formed in the plurality cavities and surrounding at least portions of the first and second nanosheet stacks. A first conformal work function layer is formed in contact with the gate dielectric layer. Portions of the first conformal work function layer are removed without using a mask from at least the second nanosheet stack. A second conformal work function layer is formed on exposed portions of the gate dielectric layer.
1. A method for forming a semiconductor structure, the method comprising at least: forming a first insulating layer having a first concentration of germanium in direct contact with a substrate;
epitaxially growing a first nanosheet stack in direct contact with a top surface of the first insulating layer, the first nanosheet stack comprising a first set of sacrificial layers formed in an alternating configuration with a first set of nanosheet layers, wherein the first set of sacrificial layers of has a second concentration of germanium;
forming a second insulating layer having the first concentration of germanium on and in direct contact with a top surface of the first nanosheet stack; and
forming a second nanosheet stack in direct contact with a top surface of the second insulating layer, the second nanosheet stack comprising a second set of sacrificial layers formed in an alternating configuration with a second set of nanosheet layers, wherein the second set of sacrificial layers has the second concentration of germanium and a thickness that is greater than a thickness of the first set of sacrificial layers.
2. The method of claim 1 , further comprising:
replacing the first and second insulating layers with first and second isolation layers, respectively;
forming a disposable gate structure over and in contact with first and second isolation layers and first and second nanosheet structures;
removing portions of the second isolation layer and portions of the sacrificial layers of the first and second nanosheet stacks not underlying the disposable gate structure;
laterally recessing end portions of the first set of sacrificial layers and the second set of sacrificial layers; and
forming a first set of inner spacers in contact with the recessed end portions of the first set of sacrificial layers and a second set of inner spacers in contact with the recessed end portions of the second set of sacrificial layers.
3. The method of claim 2 , further comprising:
forming a first source and a first drain in contact with at least the first set of inner spacers and the first set of nanosheet layers of the first nanosheet stack;
forming a dielectric layer on the first source and a first drain;
forming a second source and a second drain in contact with at least the second set of inner spacers and the second set of nanosheet layers of the second nanosheet stack; and
removing the disposable gate structure and sacrificial layers of the first and second nanosheet stacks thereby forming a plurality of cavities.
4. The method of claim 2 , further comprising:
forming a gate spacer wrapping around the disposable gate structure.
5. The method of claim 2 , wherein the disposable gate structure is formed by:
forming a dielectric layer over and in contact with portions of the first and second nanosheet stacks corresponding to a channel region; and
forming a gate cap layer over and in contact with the dielectric layer.
6. The method of claim 3 , further comprising:
forming a conformal gate dielectric layer in the plurality cavities and surrounding at least portions of each nanosheet layer of the first and second sets of nanosheet layers;
forming a first conformal work function layer in contact with the conformal gate dielectric layer;
removing, without using a mask, portions of the first conformal work function layer from at least the second nanosheet stack and sidewalls of the first nanosheet stack;
forming a second conformal work function layer on exposed portions of the conformal gate dielectric layer; and
forming a gate conductive layer in contact with the second conformal work function layer.
7. The method of claim 6 , wherein forming the conformal gate dielectric layer further comprises:
forming the conformal gate dielectric layer in contact with at least inner sidewalls of a gate spacer.
8. The method of claim 6 , wherein forming the first conformal work function layer comprises:
depositing a conformal layer of an n-type work function material.
9. The method of claim 6 , wherein forming the first conformal work function layer comprises:
pinching off the first conformal work function layer between the nanosheet layers of the first nanosheet stack.
10. The method of claim 1 , further comprising:
forming a hardmask layer on top of and in contact with the second nanosheet stack.
11. The method of claim 10 , further comprising:
patterning the first insulating layer, the second insulating layer, the first nanosheet stack, and the second nanosheet stack into a plurality of vertical stack structures.
12. A method for forming a semiconductor structure, the method comprising at least:
forming a first insulating layer having a first concentration of germanium in direct contact with a substrate;
epitaxially growing a first nanosheet stack for a first channel-type device in direct contact with a top surface of the first insulating layer, the first nanosheet stack comprising a first set of sacrificial layers formed in an alternating configuration with a first set of nanosheet layers, wherein the first set of sacrificial layers of has a second concentration of germanium;
forming a second insulating layer having the first concentration of germanium on and in direct contact with a top surface of the first nanosheet stack; and
forming a second nanosheet stack for a second channel-type device in direct contact with a top surface of the second insulating layer and above the first nanosheet stack, the second nanosheet stack comprising a second set of sacrificial layers formed in an alternating configuration with a second set of nanosheet layers, wherein the second set of sacrificial layers has the second concentration of germanium and a thickness that is greater than a thickness of the first set of sacrificial layers.
13. The method of claim 12 , further comprising:
replacing the first and second insulating layers with first and second isolation layers, respectively;
forming a disposable gate structure over and in contact with first and second isolation layers and first and second nanosheet structures;
removing portions of the second isolation layer and portions of the sacrificial layers of the first and second nanosheet stacks;
laterally recessing end portions of the first set of sacrificial layers and the second set of sacrificial layers; and
forming a first set of inner spacers in contact with the recessed end portions of the first set of sacrificial layers and a second set of inner spacers in contact with the recessed end portions of the second set of sacrificial layers.
14. The method of claim 13 , further comprising:
forming a gate spacer wrapping around the disposable gate structure.
15. The method of claim 12 , further comprising:
forming a first source and a first drain in contact with at least the first set of inner spacers and the first set of nanosheet layers of the first nanosheet stack;
forming a dielectric layer on the first source and a first drain;
forming a second source and a second drain in contact with at least the second set of inner spacers and the second set of nanosheet layers of the second nanosheet stack; and
removing the disposable gate structure and sacrificial layers of the first and second nanosheet stacks thereby forming a plurality of cavities.
16. The method of claim 15 , further comprising:
forming a conformal gate dielectric layer in the plurality cavities and surrounding at least portions of each nanosheet layer of the first and second sets of nanosheet layers;
forming a first conformal work function layer in contact with the conformal gate dielectric layer;
removing, without using a mask, portions of the first conformal work function layer from at least the second nanosheet stack and sidewalls of the first nanosheet stack;
forming a second conformal work function layer on exposed portions of the conformal gate dielectric layer; and
forming a gate conductive layer in contact with the second conformal work function layer.
17. The method of claim 13 , further comprising:
forming a hardmask layer on top of and in contact with the second nanosheet stack.
18. The method of claim 17 , wherein prior to replacing the first and second insulating layers with respectively first and second isolation layers, the method further comprising:
patterning the first insulating layer, the second insulating layer, the first nanosheet stack, and the second nanosheet stack into a plurality of vertical stack structures.
19. A method for forming a semiconductor structure, the method comprising at least:
forming a first insulating layer having a first concentration of germanium on a substrate;
epitaxially growing a first nanosheet stack comprising a first set of alternating sacrificial layers and nanosheet layers, wherein the sacrificial layers of the first nanosheet stack has a second concentration of germanium;
forming a second insulating layer having the first concentration of germanium on and in contact with a top surface of the first nanosheet stack;
forming a second nanosheet stack comprising a second set of alternating sacrificial layers and nanosheet layers, wherein the sacrificial layers of the second nanosheet stack has the second concentration of germanium and a thickness that is greater than a thickness of the first set of sacrificial layers;
replacing the first and second insulating layers with first and second isolation layers, respectively;
forming a disposable gate structure over and in contact with first and second isolation layers and first and second nanosheet structures;
removing portions of the second isolation layer and portions of the sacrificial layers of the first and second nanosheet stacks not underlying the disposable gate structure;
laterally recessing end portions of the sacrificial layers of the first and second nanosheet stacks;
forming inner spacers in contact with the recessed end portions of the sacrificial layers of the first and second nanosheet stacks;
forming a first source and a first drain in contact with at least the inner spacers and nanosheet layers of the first nanosheet stack;
forming a dielectric layer on the first source and a first drain;
forming a second source and a second drain in contact with at least the inner spacers and the nanosheet layers of the first nanosheet stack; and
removing the disposable gate structure and sacrificial layers of the first and second nanosheet stacks thereby forming a plurality of cavities.
20. The method of claim 19 , further comprising:
forming a conformal gate dielectric layer in the plurality of cavities and surrounding at least portions of each nanosheet layer of the first and second nanosheet stacks;
forming a first conformal work function layer in contact with the conformal gate dielectric layer;
removing, without using a mask, portions of the first conformal work function layer from at least the second nanosheet stack and sidewalls of the first nanosheet stack;
forming a second conformal work function layer on exposed portions of the conformal gate dielectric layer; and
forming a gate conductive layer in contact with the second conformal work function layer.