424 encoding schemes to reduce coupling and power noise on PAM-4 data buses
Methods of operating a serial data bus generate two-level bridge symbols to insert between four-level symbols on one or more data lanes of the serial data bus, to reduce voltage deltas on the one or more data lanes during data transmission on the serial data bus.
1. A method of encoding a series of data bits onto a serial data bus, the method comprising:
determining if (a) a first four-level symbol for a first sequence of two bits of the series of data bits is at a first voltage level of a Pulse Amplitude Modulation 4 Level (PAM-4) encoding, wherein the first voltage level is one of a highest of four voltage levels of the PAM-4 encoding and a lowest of the four voltage levels of the PAM-4 encoding;
determining if (b) a second four-level symbol for a second sequence of two bits of the series of data bits immediately following the first sequence of two bits is at a second voltage level of the PAM-4 encoding different than the first voltage level, wherein the second voltage level is one of the highest voltage level used by the PAM-4 encoding and the lowest voltage level used by the PAM-4 encoding; and
on condition that (a) and (b) are both true, encoding a two-level bridge symbol between the first four-level symbol and the second four-level symbol on a data lane of the serial data bus.
2. The method of claim 1 , wherein the first four-level symbol is at the highest voltage level of the PAM-4 encoding, and the second four-level symbol is at the lowest voltage level of the PAM-4 encoding, the two-level bridge symbol being a higher of two middle voltage levels of the PAM-4 encoding.
3. The method of claim 1 , wherein the first four-level symbol is at the highest voltage level of the PAM-4 encoding, and the second four-level symbol is at the lowest voltage level of the PAM-4 encoding, the two-level bridge symbol being a lower of two middle voltage levels of the PAM-4 encoding.
4. The method of claim 1 , wherein the first four-level symbol is at the lowest voltage level of the PAM-4 encoding, and the second four-level symbol is at the highest voltage level of the PAM-4 encoding, the two-level bridge symbol being a higher of two middle voltage levels of the PAM-4 encoding.
5. The method of claim 1 , wherein the first four-level symbol is at the lowest voltage level of the PAM-4 encoding, and the second four-level symbol is at the highest voltage level of the PAM-4 encoding, the two-level bridge symbol being a lower of two middle voltage levels of the PAM-4 encoding.
6. An encoder comprising:
an interface to a serial data bus; and
logic to encode a two-level bridge symbol between a first four-level symbol and a second four-level symbol on a data lane of the serial data bus on condition that the first four level symbol and the second four-level symbol are at different extreme voltage levels of a Pulse Amplitude Modulation 4 Level (PAM-4) encoding, wherein an extreme voltage level is one of 0ΔV and 3ΔV.
7. The encoder of claim 6 , wherein the first four-level symbol is at a highest voltage level of the PAM-4 encoding, and the second four-level symbol is at a lowest voltage level of the PAM-4 encoding, the two-level bridge symbol being a higher of two middle voltage levels (1ΔV and 2ΔV) of the PAM-4 encoding.
8. The encoder of claim 6 , wherein the first four-level symbol is at a highest voltage level of the PAM-4 encoding, and the second four-level symbol is at a lowest voltage level of the PAM-4 encoding, the two-level bridge symbol being a lower of two middle voltage levels (1ΔV and 2ΔV) of the PAM-4 encoding.
9. The encoder of claim 6 , wherein the first four-level symbol is at a lowest voltage level of the PAM-4 encoding, and the second four-level symbol is at a highest voltage level of the PAM-4 encoding, the two-level bridge symbol being a higher of two middle voltage levels (1ΔV and 2ΔV) of the PAM-4 encoding.
10. The encoder of claim 6 , wherein the first four-level symbol is at a lowest voltage level of the PAM-4 encoding, and the second four-level symbol is at a highest voltage level of the PAM-4 encoding, the two-level bridge symbol being a lower of two middle voltage levels (1ΔV and 2ΔV) of the PAM-4 encoding.
11. An encoder for a serial data bus, the encoder comprising:
an interface to a serial data bus; and
encoding logic configured to encode a two-level bridge symbol between a first four-level symbol and a second four-level symbol on a data lane of the serial data bus on condition that an encoding of first four-level symbol and an encoding of the second four-level symbol differ from one another by more than one voltage level of four voltage levels used in a Pulse Amplitude Modulation 4 Level (PAM-4) encoding.
12. The encoder of claim 11 , the encoding logic configured to encode the two-level bridge symbol between the first four-level symbol and the second four-level symbol on condition that the first four-level symbol and the second four-level symbol are separated by exactly three voltage levels of the PAM-4 encoding.
13. The encoder of claim 11 , the encoding logic configured to encode the two-level bridge symbol at a voltage level selected based on a voltage level of the second four-level symbol.
14. The encoder of claim 11 , wherein the first four-level symbol is at a highest voltage level of the PAM-4 encoding, and the second four-level symbol is at a lowest voltage level of the PAM-4 encoding, the two-level bridge symbol being a higher of two middle voltage levels of the PAM-4 encoding.
15. The encoder of claim 11 , wherein the first four-level symbol is at a lowest voltage level of the PAM-4 encoding, and the second four-level symbol is at a highest voltage level of the PAM-4 encoding, the two-level bridge symbol being a lower of two middle voltage levels of the PAM-4 encoding.
16. A method of encoding a series of data bits onto a serial data bus, the method comprising:
receiving five sequential bits of the series of data bits; and
encoding a two-level bridge symbol for a third bit of the series of data bits between a first four-level symbol for a first two bits of the series of data bits and a second four-level symbol for a last two bits of the series of data bits on a data lane of the serial data bus on condition that an encoding of the first four-level symbol and an encoding of the second four-level symbol differ from one another by more than one voltage level of four voltage levels used in a Pulse Amplitude Modulation 4 Level (PAM-4) encoding.
17. The method of claim 16 , further comprising encoding the two-level bridge symbol between the first four-level symbol and the second four-level symbol on condition that the first four level symbol and the second four-level symbol are separated by exactly three voltage levels of the PAM-4 encoding.
18. The method of claim 16 , further comprising encoding the two-level bridge symbol at a voltage level selected based on a voltage level of the second four-level symbol.
19. The method of claim 16 , wherein the first four-level symbol is at a highest voltage level of the PAM-4 encoding, and the second four-level symbol is at a lowest voltage level of the PAM-4 encoding, the two-level bridge symbol being a higher of two middle voltage levels of the PAM-4 encoding.
20. The method of claim 16 , wherein the first four-level symbol is at a lowest voltage level of the PAM-4 encoding, and the second four-level symbol is at a highest voltage level of the PAM-4 encoding, the two-level bridge symbol being a lower of two middle voltage levels of the PAM-4 encoding.