Granted Patent B2

US 12,197,281 · App. 18/459,215 · Granted Jan 14, 2025

Inventors: Gautam Bhatia (San Mateo, CA); Sunil Sudhakaran (Brisbane, CA); Kyutaeg Oh (San Ramon, CA)

Assignee: NVIDIA Corp.

G06F11/1004G06F11/0787G06F11/1068

Abstract

Claims (47)

1. A transceiver configured to communicate a burst of data bits and meta-data bits for the data bits, the transceiver comprising:

communication channels comprising a plurality of data channels, a plurality of auxiliary data channels, and at least one error correction channel;

an encoder configured to:

apply 11b7s encoding to a first plurality of the data bits to generate first PAM-3 symbols on some or all of the communication channels; and

apply 3b2s encoding to a second plurality of the data bits to generate second PAM-3 symbols distinct from the first PAM-3 symbols on at least some of the communication channels.

2. The transceiver of claim 1 , wherein the communication channels consist of eight data channels, two auxiliary data channels, and one error correction channel.

3. The transceiver of claim 2 , wherein the encoder is configured to apply 3b2s encoding to the second plurality of the data bits to generate the second PAM-3 symbols on the error correction channel.

4. The transceiver of claim 1 , wherein the meta-data bits consist of a cyclic redundancy check (CRC) and one or both of a poison bit and a severity bit, and the encoder is further configured to apply 3b2s encoding to the CRC to generate third PAM-3 symbols on the error correction channel.

5. The transceiver of claim 4 , the encoder further configured to apply a 3b2s encoding to generate one PAM-3 symbol for a combined state of the poison bit and the severity bit.

6. The transceiver of claim 5 , wherein the PAM-3 symbol for the combined state of the poison bit and the severity bit is encoded on the error correction channel.

7. The transceiver of claim 4 , the encoder further configured to utilize particular reserved 11b7s codewords for the poison bit and the severity bit.

8. A transceiver configured to communicate a burst of data bits and meta-data bits for the data bits, the transceiver comprising: communication channels comprising a plurality of data channels, a plurality of auxiliary data channels, and at least one error correction channel;

a decoder configured to:

apply 11b7s decoding to recover a first plurality of the data bits from first PAM-3 symbols on some or all of the communication channels; and

apply 3b2s decoding to recover a second plurality of the data bits from second PAM-3 symbols that are distinct from the first PAM-3 symbols on at least some of the communication channels.

9. The transceiver of claim 8 , wherein the communication channels consist of eight data channels, two auxiliary data channels, and one error correction channel.

10. The transceiver of claim 9 , wherein the decoder is configured to apply 3b2s decoding to recover the second plurality of the data bits from the second PAM-3 symbols on the error correction channel.

11. The transceiver of claim 8 , wherein the meta-data bits consist of a cyclic redundancy check (CRC) and one or both of a poison bit and a severity bit, and the decoder is further configured to apply 3b2s decoding to recover the CRC from third PAM-3 symbols on the error correction channel.

12. The transceiver of claim 11 , the decoder further configured to apply 3b2s decoding to recover a combined state of the poison bit and the severity bit from one PAM-3 symbol.

13. The transceiver of claim 12 , wherein the PAM-3 symbol for the combined state of the poison bit and the severity bit is decoded from the error correction channel.

14. The transceiver of claim 11 , the decoder further configured to recover the poison bit and the severity bit from PAM-3 symbols comprising particular reserved 11b7s codewords.

15. A method of communicating a burst of data bits over a serial data bus comprising a plurality of data channels, a plurality of auxiliary data channels, and at least one error correction channel, the method comprising:

applying, with an encoder, 11b7s encoding to a first plurality of the data bits to generate first PAM-3 symbols on the serial data bus; and

applying, with the encoder, 3b2s encoding to a second plurality of the data bits to generate second PAM-3 symbols distinct from the first PAM-3 symbols on the serial data bus.

16. The method of claim 15 , wherein the serial data bus comprises eight data channels, two auxiliary data channels, and one error correction channel.

17. The method of claim 16 , wherein the encoder applies 3b2s encoding to the second plurality of the data bits to generate the second PAM-3 symbols on the error correction channel.

18. The method of claim 15 , further comprising generating meta-data bits for the data bits, the meta-data bits consisting of a cyclic redundancy check (CRC) and one or both of a poison bit and a severity bit, and the encoder applies 3b2s encoding to the CRC to generate third PAM-3 symbols on the error correction channel.

19. The method of claim 18 , the encoder further applying 3b2s encoding to generate one PAM-3 symbol for a combined state of the poison bit and the severity bit.

20. The method of claim 19 , wherein the PAM-3 symbol for the combined state of the poison bit and the severity bit is encoded on the error correction channel.

21. The method of claim 18 , the encoder further utilizing particular reserved 11b7s codewords to encode the poison bit and the severity bit.

22. A system comprising:

a machine memory;

a data processor;

a memory bus coupling the machine memory to the data processor, the memory bus comprising communication channels comprising eight data channels, two auxiliary data channels, and one error correction channel; and

an encoder configured to:

apply 11b7s encoding to a first plurality of data bits to generate first PAM-3 symbols on some or all of the communication channels; and

apply 3b2s encoding to a second plurality of the data bits to generate second PAM-3 symbols distinct from the first PAM-3 symbols on at least some of the communication channels.

23. The system of claim 22 , wherein the encoder is configured to apply 3b2s encoding to the second plurality of the data bits to generate the second PAM-3 symbols on the error correction channel.

24. The system of claim 22 , further comprising generating meta-data bits for the data bits, the meta-data bits consisting of a cyclic redundancy check (CRC) and one or both of a poison bit and a severity bit, and the encoder is further configured to apply 3b2s encoding to the CRC to generate third PAM-3 symbols on the error correction channel.

25. The system of claim 24 , the encoder further configured to apply 3b2s encoding to generate one PAM-3 symbol for a combined state of the poison bit and the severity bit.

26. The system of claim 25 , wherein the PAM-3 symbol for the combined state of the poison bit and the severity bit is encoded on the error correction channel.

27. The system of claim 24 , the encoder further configured to utilize particular reserved 11b7s codewords for the poison bit and the severity bit.

28. A transceiver configured to communicate a burst of data bits and meta-data bits for the data bits, the transceiver comprising: communication channels comprising a plurality of data channels, a plurality of auxiliary data channels, and at least one error correction channel;

an encoder configured to:

apply 11b7s encoding to a first plurality of the data bits to generate first PAM-3 symbols on some or all of the communication channels;

apply 3b2s encoding to a second plurality of the data bits to generate second PAM-3 symbols on at least some of the communication channels; and

wherein the meta-data bits consist of a cyclic redundancy check (CRC) and one or both of a poison bit and a severity bit, and the encoder is further configured to apply 3b2s encoding to the CRC to generate third PAM-3 symbols on the error correction channel.

Assignments (1)

Continuity (7)

References Cited (226)