Maximum transition avoidance (MTA) encoding
A PAM-4 communication process divides a full burst of raw data into two half bursts, extracts a bit from each half burst and communicating the extracted bit on a DBI line, and encodes the remaining bits of the half burst to avoid maximum transitions between PAM-4 symbols on a data line.
1. A PAM-4 communication process comprising:
dividing a full burst of raw data on at least one data line into two half bursts;
extracting a bit from each half burst and communicating extracted bits on a data bus inversion (DBI) line; and
encoding remaining bits of the half burst to avoid maximum transitions between PAM-4 symbols on the data line.
2. The PAM-4 communication process of claim 1 , wherein the full burst is 16-bits and each half burst is 8-bits.
3. The PAM-4 communication process of claim 2 , wherein 7-bits of each half burst are encoded into an eight bit code word representing four PAM-4 symbols on the data line.
4. The PAM-4 communication process of claim 1 , wherein the extracted bits are encoded as a PAM-4 symbol on the DBI line.
5. The PAM-4 communication process of claim 4 , wherein an extracted bit from a first half burst on a particular data line is combined with an extracted bit from a second half burst on the particular data line to form the PAM-4 symbol on the DBI line.
6. The PAM-4 communication process of claim 4 , wherein an extracted bit from a half burst on a first data line is combined with an extracted bit from a half burst on a different data line to form the PAM-4 symbol on the DBI line.
7. The PAM-4 communication process of claim 1 , wherein the extracted bits are a least significant bit of each of the half bursts.
8. The PAM-4 communication process of claim 1 , further comprising:
inverting a codebook used to encode remaining bits of a second half burst when a most significant bit of a symbol of a first half burst has a predetermined value.
9. A transmitter for a data bus, the transmitter comprising:
a splitter to divide a full burst of raw data on at least one data line into two half bursts, and to extract a bit from each half burst for communication on a data bus inversion (DBI) line; and
an encoder configured to encode remaining bits of the half burst to avoid maximum transitions between PAM-4 symbols on the data line.
10. The transmitter of claim 9 , wherein the full burst is 16-bits and each half burst is 8-bits.
11. The transmitter of claim 10 , wherein the encoder is configured to encode 7-bits of each half burst into an eight bit code word representing four PAM-4 symbols on the data line.
12. The transmitter of claim 9 , further comprising an interleaver to encode the extracted bits as a PAM-4 symbol on the DBI line.
13. The transmitter of claim 12 , wherein the encoder is configured to encode the extracted bit from a first half burst on a particular data line with the extracted bit from a second half burst on the particular data line to form the PAM-4 symbol on the DBI line.
14. The transmitter of claim 12 , wherein the encoder is configured to encode the extracted bit from a half burst on a first data line with the extracted bit from a half burst on a different data line to form the PAM-4 symbol on the DBI line.
15. The transmitter of claim 9 , wherein the extracted bit is a least significant bit of the half burst.
16. The transmitter of claim 9 , wherein the encoder is configured to invert a codebook used to encode remaining bits of a second half burst when a most significant bit of a symbol of a first half burst has a predetermined value.