IP Library Granted Patent US 10,818,612
Granted Patent B2
US 10,818,612 · App. 16/372,436 · Granted Oct 27, 2020

Manufacturing method of semiconductor structure

Inventors: Rung-De Wang (Kaohsiung, TW); Chen-Hsun Liu (Tainan, TW); Chin-Yu Ku (Hsinchu, TW); Te-Hsun Pang (Tainan, TW); Chia-Hua Wang (Tainan, TW); Pei-Shing Tsai (Tainan, TW); Po-Chang Lin (Kaohsiung, TW)
Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
H01L23/562H01L21/6835H01L21/76898H01L21/78H01L23/3142H01L23/481H01L23/5226H01L23/585H01L21/782H01L21/784H01L21/823871H01L23/49827H01L23/5384H01L2221/6834H01L2221/68327H01L2221/68381
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Quick Facts
Patent No.
US 10,818,612
App. No.
16/372,436
Granted
Oct 27, 2020
Kind
B2
Abstract

A manufacturing method of a semiconductor structure includes at least the following steps. A semiconductor device having a first surface and a second surface opposite to the first surface is provided. A plurality of through semiconductor vias (TSV) embedded in the semiconductor device is formed. A first seal ring is formed over the first surface of the semiconductor device. The first seal ring is adjacent to edges of the first surface and is physically in contact with the TSVs. A second seal ring is formed over the second surface of the semiconductor device. The second seal ring is adjacent to edges of the second surface and is physically in contact with the TSVs.

Claims (50)

1. A manufacturing method of a semiconductor structure, comprising:

providing a semiconductor device having a first surface and a second surface opposite to the first surface;

forming a plurality of through semiconductor vias (TSV) embedded in the semiconductor device;

forming a first seal ring over the first surface of the semiconductor device, wherein the first seal ring is adjacent to edges of the first surface and is physically in contact with the plurality of TSVs; and

forming a second seal ring over the second surface of the semiconductor device, wherein the second seal ring is adjacent to edges of the second surface and is physically in contact with the plurality of TSVs.

2. The method according to claim 1 , wherein the step of forming the plurality of TSVs comprises:

forming a plurality of trenches in the semiconductor device;

depositing a seed layer on the first surface of the semiconductor device, wherein the seed layer extends into the plurality of trenches;

forming a conductive material over the seed layer; and

removing a portion of the conductive material and a portion of the seed layer until the first surface of the semiconductor device is exposed.

3. The method according to claim 2 , further comprising thinning the semiconductor device from the second surface such that the plurality of TSVs is exposed.

4. The method according to claim 3 , wherein the semiconductor device is thinned from the second surface after the first seal ring is formed.

5. The method according to claim 3 , wherein the semiconductor device is thinned from the second surface before the second seal ring is formed.

6. The method according to claim 3 , wherein the semiconductor device is thinned from the second surface such that the seed layer is exposed.

7. The method according to claim 1 , further comprising:

forming a scribe line in the semiconductor device; and

forming a dielectric material layer covering the scribe line and at least a portion of the second seal ring.

8. A manufacturing method of a semiconductor structure, comprising:

providing a semiconductor device having an active region and a peripheral region surrounding the active region;

forming a plurality of through semiconductor vias (TSV) penetrating through the semiconductor device in the peripheral region;

forming a first seal ring on one side of the plurality of TSVs; and

forming a second seal ring on another side of the plurality of TSVs opposite to the first seal ring.

9. The method according to claim 8 , wherein the step of forming the plurality of TSVs comprises:

forming a plurality of trenches in the peripheral region of the semiconductor device;

depositing a seed layer on a first surface of the semiconductor device, wherein the seed layer extends into the plurality of trenches;

forming a conductive material over the seed layer; and

removing a portion of the conductive material and a portion of the seed layer until the first surface of the semiconductor device is exposed.

10. The method according to claim 9 , further comprising thinning the semiconductor device from a second surface of the semiconductor device opposite to the first surface.

11. The method according to claim 10 , wherein the semiconductor device is thinned from the second surface after the first seal ring is formed.

12. The method according to claim 10 , wherein the semiconductor device is thinned from the second surface before the second seal ring is formed.

13. The method according to claim 10 , wherein the semiconductor device is thinned from the second surface such that the seed layer is exposed.

14. The method according to claim 8 , wherein the conductive material and the second seal ring is separated by the seed layer.

15. A manufacturing method of a semiconductor structure, comprising:

providing a semiconductor device having a first surface and a second surface opposite to the first surface, wherein the semiconductor device comprises an active region and a peripheral region surrounding the active region;

forming a plurality of through semiconductor vias (TSV) embedded in peripheral region of the semiconductor device;

forming a first interconnection layer on the first surface of the semiconductor device, wherein the first interconnection layer comprises a first seal ring structure physically connected to the TSVs; and

forming a second interconnection layer on the second surface of the semiconductor device, wherein the second interconnection layer comprises a second seal ring structure physically connected to the TSVs.

16. The method according to claim 15 , further comprising:

forming a first top metal layer over the first seal ring structure, wherein the first seal ring structure and the first top metal layer form a first seal ring; and

forming a passivation layer over the first interconnection layer to cover the first top metal layer.

17. The method according to claim 15 , further comprising:

forming an opening in the second interconnection layer to expose the second seal ring structure; and

forming a second top metal layer over the second interconnection layer and in the opening such that the second top metal layer is physically in contact with the second seal ring structure, and the second seal ring structure and the second top metal layer form a second seal ring.

18. The method according to claim 15 , wherein the step of forming the plurality of TSVs comprises:

forming a plurality of trenches in the semiconductor device;

depositing a seed layer on the first surface of the semiconductor device, wherein the seed layer extends into the plurality of trenches;

forming a conductive material over the seed layer; and

removing a portion of the conductive material and a portion of the seed layer until the first surface of the semiconductor device is exposed.

19. The method according to claim 18 , further comprising thinning the semiconductor device from a second surface of the semiconductor device opposite to the first surface such that the plurality of TSVs is exposed.

20. The method according to claim 15 , further comprising forming a scribe line in the semiconductor device, wherein the peripheral region is between the active region and the scribe line.

Continuity (3)
Division 15866472 · Jan 10, 2018
Provisional Application 62579159 · Oct 31, 2017
Related Publication 20190371741A1 · Dec 5, 2019