IP Library › Granted Patent US 10,804,414
Granted Patent B2
US 10,804,414 · App. 16/390,080 · Granted Oct 13, 2020

Semiconductor device with nanostructures and methods of forming the same

Inventors: Hsin-Hsiang Tseng (Changhua County, TW); Chih-Fei Lee (Tainan, TW); Chia-Pin Cheng (Kaohsiung, TW); Fu-Cheng Chang (Tainan, TW)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
H01L31/02162H01L27/14643H01L27/14683H01L31/0232H01L31/1125Y02E10/50Y02P70/521
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Quick Facts
Patent No.
US 10,804,414
App. No.
16/390,080
Granted
Oct 13, 2020
Kind
B2
Abstract

A method of forming a semiconductor device includes forming a photo sensing region in a semiconductor substrate, wherein the semiconductor substrate is of a first type dopant and the photo sensing region is of a second type dopant that has a different conductivity type than the first type dopant; forming a nanostructure layer in contact with an interface between the photo sensing region and the semiconductor substrate; and etching the nanostructure layer until exposing the photo sensing region to form a plurality of nanostructures.

Claims (39)

1. A method of forming a semiconductor device, comprising:

forming a photo sensing region in a semiconductor substrate, wherein the semiconductor substrate is of a first type dopant and the photo sensing region is of a second type dopant that has a different conductivity type than the first type dopant;

forming a nanostructure layer in contact with an interface between the photo sensing region and the semiconductor substrate; and

etching the nanostructure layer until exposing the photo sensing region to form a plurality of nanostructures.

2. The method of claim 1 , wherein forming the nanostructure layer is performed such that a material of the nanostructure layer is different from a material of the photo sensing region in the semiconductor substrate.

3. The method of claim 1 , wherein etching the nanostructure layer is performed to expose the semiconductor substrate.

4. The method of claim 1 , further comprising:

forming a dielectric layer over the nanostructures and in contact with the semiconductor substrate.

5. The method of claim 1 , further comprising:

forming a light filter layer over the nanostructures.

6. The method of claim 1 , wherein etching the nanostructure layer is performed such that the nanostructures are arranged in a hexagonal close packing arrangement.

7. The method of claim 1 , wherein etching the nanostructure layer is performed such that the nanostructures are in contact with each other.

8. The method of claim 1 , wherein the nanostructure layer comprises a silicon-containing material and the photo sensing region comprises a gallium-containing material.

9. A method of forming a semiconductor device, comprising:

forming a photo sensing region in a semiconductor substrate, wherein the semiconductor substrate is of a first type dopant and the photo sensing region is of a second type dopant that has a different conductivity type than the first type dopant;

removing portions of the photo sensing region to form a plurality of recesses;

filling a material into the recesses; and

planarizing the material until exposing the photo sensing region to form a plurality of nanostructures.

10. The method of claim 9 , wherein removing the portions of the photo sensing region comprising:

forming a photoresist layer over the photo sensing region;

patterning the photoresist layer; and

etching the photo sensing region using the patterned photoresist layer as an etch mask.

11. The method of claim 10 , wherein forming the photoresist layer is performed such that the photoresist layer is in contact with the semiconductor substrate.

12. The method of claim 9 , wherein removing portions of the photo sensing region is performed such that one of the recesses has a bottom surface, and a circle equivalent diameter of the bottom surface is about (4A/π)1/2, where A is an area of the bottom surface.

13. The method of claim 9 , wherein planarizing the material is performed such that top surfaces of the nanostructures are coplanar with a top surface of the photo sensing region.

14. The method of claim 9 , further comprising:

forming a dielectric layer over the nanostructures and in contact with the semiconductor substrate.

15. The method of claim 9 , wherein removing portions of the photo sensing region is performed such that the recesses are arranged in a hexagonal close packing arrangement.

16. A method of forming a semiconductor device, comprising:

forming a photo sensing region in a semiconductor substrate, wherein the semiconductor substrate is of a p-type dopant and the photo sensing region is of a n-type dopant;

forming a nanostructure layer above the photo sensing region, wherein a width of the nanostructure layer is wider than a width of the photo sensing region;

etching the nanostructure layer to form a plurality of nanostructures; and

forming a light filter layer over the nanostructures.

17. The method of claim 16 , further comprising:

forming a dielectric layer over the nanostructures prior to forming the light filter layer.

18. The method of claim 17 , wherein etching the nanostructure layer is performed until exposing the semiconductor substrate.

19. The method of claim 16 , further comprising:

forming a microlens layer over the light filter layer.

20. The method of claim 16 , wherein forming the nanostructure layer is performed such that a material of the nanostructure layer is different from a material of the photo sensing region in the semiconductor substrate.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 22, 2019
From: TSENG, HSIN-HSIANG; LEE, CHIH-FEI; CHENG, CHIA-PIN; CHANG, FU-CHENG
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 048951/0505 →
Continuity (3)
Division 15469646 · Mar 27, 2017
Provisional Application 62433307 · Dec 13, 2016
Related Publication 20190252559A1 · Aug 15, 2019