Vertical interconnect features and methods of forming
Vertical interconnect structures and methods of forming are provided. The vertical interconnect structures may be formed by partially filling a first opening through one or more dielectric layers with layers of conductive materials. A second opening is formed in a dielectric layer such that a depth of the first opening after partially filling with the layers of conductive materials is close to a depth of the second opening. The remaining portion of the first opening and the second opening may then be simultaneously filled.
1. A method of forming a semiconductor structure, the method comprising:
forming a first dielectric layer on a substrate;
forming a first conductive feature in the first dielectric layer, the first conductive feature being electrically connected to a first conductive region;
forming a second dielectric layer over the first dielectric layer and the first conductive feature;
after forming the second dielectric layer, forming a first opening extending through the first dielectric layer and the second dielectric layer exposing a second conductive region;
forming a first conductive material in the first opening;
forming a second conductive material over the first conductive material in the first opening;
after forming a second conductive material over the first conductive material in the first opening, forming a patterned mask over the second dielectric layer, the patterned mask covering the first opening and exposing a region of the second dielectric layer vertically over the first conductive feature;
forming a second opening in the second dielectric layer using the patterned mask as a mask, the second opening exposing a portion of the first conductive feature;
removing the patterned mask; and
depositing a third conductive material in the first opening and the second opening, the third conductive material filling the first opening and the second opening.
2. The method of claim 1 , further comprising removing excess portions of the third conductive material from a top surface of the second dielectric layer by a planarization process.
3. The method of claim 1 , wherein the patterned mask overlies the second conductive material and fills the first opening while forming the second opening.
4. The method of claim 1 , wherein forming the second conductive material comprises performing an ALD process.
5. The method of claim 1 , wherein forming the first conductive material comprises:
forming a layer of the first conductive material along an upper surface of the second dielectric layer, along sidewalls of the first opening, and along a bottom of the first opening; and
removing the first conductive material from the upper surface of the second dielectric layer and along the sidewalls of the first opening.
6. The method of claim 5 , wherein removing the first conductive material comprises:
removing the first conductive material from the upper surface of the second dielectric layer; and
after removing the first conductive material from the upper surface of the second dielectric layer, removing the first conductive material from the sidewalls of the second dielectric layer.
7. The method of claim 1 , wherein an upper surface of the second conductive material is level with an upper surface of the first dielectric layer.
8. A method of forming a semiconductor structure, the method comprising:
forming a first dielectric layer on a substrate;
forming a first conductive feature in the first dielectric layer;
forming a second dielectric layer over the first dielectric layer and the first conductive feature;
forming a first opening extending through the first dielectric layer and the second dielectric layer;
depositing a first conductive material along a bottom of the first opening, sidewalls of the second dielectric layer in the first opening being free of the first conductive material;
forming a second conductive material over the first conductive material, wherein at least a portion of the sidewalls of the second dielectric layer in the first opening is free of the second conductive material;
forming a patterned mask over the second dielectric layer, the patterned mask covering the first opening and exposing a region of the second dielectric layer vertically over the first conductive feature;
removing a portion of the second dielectric layer from the region exposed by the patterned mask, removing the portion of the second dielectric layer forming a second opening exposing a portion of the first conductive feature;
removing the patterned mask; and
depositing a third conductive material, the third conductive material filling the first opening and the second opening, wherein the first conductive feature and the third conductive material in the second opening form a first conductive element, wherein the first conductive material, the second conductive material, and the third conductive material in the first opening form a second conductive element.
9. The method of claim 8 , wherein the first conductive element comprises a contact to a source/drain region.
10. The method of claim 9 , wherein the second conductive element comprises a contact to a gate electrode.
11. The method of claim 8 , wherein depositing the first conductive material comprises:
depositing a layer of the first conductive material along sidewalls of the second dielectric layer and over an upper surface of the second dielectric layer;
forming a mask over the layer of the first conductive material in the first opening, wherein the first conductive material over an upper surface of the second dielectric layer is exposed;
removing the first conductive material from the upper surface of the second dielectric layer;
removing the mask; and
removing the first conductive material from sidewalls of the second dielectric layer.
12. The method of claim 8 , wherein the second conductive material contacts the second dielectric layer.
13. The method of claim 12 , wherein the third conductive material contacts the second dielectric layer.
14. The method of claim 8 , wherein an upper surface of the second conductive material is substantially level with an upper surface of the first dielectric layer.
15. A method of forming a semiconductor structure, the method comprising:
forming a first dielectric layer on a substrate, the first dielectric layer having a first conductive feature therein, wherein an upper surface of the first dielectric layer is level with an upper surface of the first conductive feature;
forming a second dielectric layer over the first dielectric layer and the first conductive feature;
forming a first opening extending through the first dielectric layer and the second dielectric layer exposing a second conductive feature;
after forming the first opening extending through the first dielectric layer and the second dielectric layer, forming a first conductive material in the first opening, wherein an upper surface of the first conductive material is recessed below the upper surface of the first dielectric layer;
forming a second conductive material over the first conductive material in the first opening;
after forming the second conductive material, forming a second opening in the second dielectric layer, the second opening exposing a portion of the first conductive feature; and
depositing a third conductive material in the first opening and the second opening.
16. The method of claim 15 , wherein an upper surface of the third conductive material is level with an upper surface of the second dielectric layer.
17. The method of claim 15 , wherein forming the first conductive material in the first opening comprises:
forming a layer of the first conductive material along an upper surface of the second dielectric layer, along sidewalls of the first opening, and along a bottom of the first opening; and
removing the first conductive material from the upper surface of the second dielectric layer and along sidewalls of the second dielectric layer.
18. The method of claim 17 , wherein removing the first conductive material comprises:
forming a first mask over the first conductive material in the first opening;
performing a first etch process to remove exposed portions of the first conductive material over the upper surface of the second dielectric layer;
removing the first mask; and
performing a second etch process to remove portions of the first conductive material along sidewalls of the first opening.
19. The method of claim 15 , wherein an upper surface of the second conductive material is no higher than the upper surface of the first dielectric layer.
20. The method of claim 15 , wherein the first conductive material is a different material than the second conductive material.