IP Library › Granted Patent US 10,892,366
Granted Patent B2
US 10,892,366 · App. 16/450,218 · Granted Jan 12, 2021

Thin film transistor and vertical non-volatile memory device including transition metal-induced polycrystalline metal oxide channel layer

Inventors: Jae Kyeong Jeong (Seoul, KR); Yun Heub Song (Seoul, KR); Chang Hwan Choi (Seoul, KR); Hyeon Joo Seul (Seoul, KR)
Assignee: Samsung Electronics Co., Ltd.
H01L29/7869H01L27/1156H01L27/1158H01L27/11514H01L27/11551H01L27/11553H01L27/11556H01L27/11558H01L27/11582H01L27/11597H01L27/249H01L27/2481
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Quick Facts
Patent No.
US 10,892,366
App. No.
16/450,218
Granted
Jan 12, 2021
Kind
B2
Abstract

The semiconductor device includes a substrate, a stack structure including gate patterns and interlayer insulating films that are alternately stacked on the substrate, an insulating pillar extending in a thickness direction of the substrate within the stack structure, a polycrystalline metal oxide film extending along a sidewall of the insulating pillar between the insulating pillar and the stack structure, a liner film having a transition metal between the insulating pillar and the polycrystalline metal oxide film, and a tunnel insulating film, a charge storage film, and a blocking insulating film which are disposed in order between the polycrystalline metal oxide film and the gate patterns.

Claims (33)

1. A semiconductor device, comprising:

a substrate;

a liner pattern including a transition metal on the substrate;

a polycrystalline metal oxide pattern on the liner pattern;

an insulating film extending along a sidewall of the liner pattern, a sidewall of the polycrystalline metal oxide pattern, and an upper surface of the polycrystalline metal oxide pattern; and

a gate electrode on the insulating film.

2. The semiconductor device as claimed in claim 1 , further comprising a contact on at least one side of the gate electrode,

wherein the contact is connected to the polycrystalline metal oxide pattern and penetrates through the insulating film.

3. The semiconductor device as claimed in claim 1 , wherein the insulating film does not extend along an upper surface of the gate electrode.

4. The semiconductor device as claimed in claim 1 , further comprising an insertion insulating film between the substrate and the liner pattern.

5. The semiconductor device as claimed in claim 1 , wherein the liner pattern includes a transition metal oxide or a transition metal oxynitride.

6. The semiconductor device as claimed in claim 1 , wherein the polycrystalline metal oxide pattern includes an In-Ga oxide film, an In-Zn oxide film, or an In-Ga-Zn oxide film.

7. The semiconductor device as claimed in claim 1 , wherein the transition metal includes at least one of Ta, Ti, or Mo.

8. A semiconductor device, comprising:

a transition metal oxynitride film;

a conductive pattern on the transition metal oxynitride film; and

a metal oxide film between the transition metal oxynitride film and the conductive pattern.

9. The semiconductor device as claimed in claim 8 , wherein the transition metal oxynitride film and the metal oxide film are in contact with each other.

10. The semiconductor device as claimed in claim 8 , wherein the metal oxide film is a polycrystalline metal oxide film.

11. The semiconductor device as claimed in claim 8 , wherein the metal oxide film includes an In-Ga oxide film, an In-Zn oxide film, or an In-Ga-Zn oxide film.

12. The semiconductor device as claimed in claim 8 , wherein a transition metal included in the transition metal oxynitride film includes at least one of Ta, Ti, or Mo.

13. A semiconductor device, comprising:

a first conductive pattern extending in a first direction on a substrate;

a metal oxide film extending in a thickness direction of the substrate and including a first end and a second end which are opposite to each other, the first end of the metal oxide film being connected to the first conductive pattern;

an insulating film extending along a first sidewall of the metal oxide film;

a liner film extending along a second sidewall opposite to the first sidewall of the metal oxide film and including a transition metal;

a gate pattern spaced away from the substrate and on the insulating film; and

a second conductive pattern connected to the second end of the metal oxide film on the metal oxide film.

14. The semiconductor device as claimed in claim 13 , wherein the metal oxide film includes a polycrystalline metal oxide material.

15. The semiconductor device as claimed in claim 13 , wherein the metal oxide film includes one of an In-Ga oxide film, an In-Zn oxide film, and an In-Ga-Zn oxide film.

16. The semiconductor device as claimed in claim 13 , wherein the liner film includes a transition metal oxide.

17. The semiconductor device as claimed in claim 13 , wherein the liner film includes a transition metal oxynitride.

18. The semiconductor device as claimed in claim 13 , wherein the transition metal includes at least one of Ta, Ti, and Mo.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 24, 2019
From: JEONG, JAE KYEONG; SONG, YUN HEUB; CHOI, CHANG HWAN; SEUL, HYEON JOO
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 049568/0404 →
Priority Claims (1)
KR 10-2018-0072751 · Jun 25, 2018 · national
Continuity (1)
Related Publication 20190393353A1 · Dec 26, 2019