IP Library Granted Patent US 10,847,614
Granted Patent B2
US 10,847,614 · App. 16/450,252 · Granted Nov 24, 2020

Semiconductor device having a stacked electrode with an electroless nickel plating layer

Inventors: Tomoyasu Furukawa (Tokyo, JP); Toshiaki Morita (Tokyo, JP); Daisuke Kawase (Hitachi, JP); Toshihito Tabata (Hitachi, JP)
Assignee: Hitachi Power Semiconductor Device, Ltd.
H01L29/0834H01L21/288H01L24/33H01L29/7397H01L2924/01028H01L2924/01029
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Quick Facts
Patent No.
US 10,847,614
App. No.
16/450,252
Granted
Nov 24, 2020
Kind
B2
Abstract

A semiconductor device including: a semiconductor element; and a first electrode formed on a first surface of the semiconductor element. The first electrode has a stacked structure including a first electroless Ni plating layer. The first electroless Ni plating layer contains nickel (Ni) and phosphorus (P) as a composition. A phosphorus (P) concentration of the first electroless Ni plating layer is 2.5 wt % to 6 wt % inclusive, and a crystallization rate of Ni 3 P in the first electroless Ni plating layer is 0% to 20% inclusive.

Claims (48)

1. A semiconductor device comprising:

a semiconductor element; and

a first electrode formed on a first surface of the semiconductor element, wherein

the first electrode has a stacked structure including a first electroless Ni plating layer,

the first electroless Ni plating layer contains nickel (Ni) and phosphorus (P) as a composition, and

a phosphorus (P) concentration of the first electroless Ni plating layer is 2.5 wt % to 6 wt % inclusive, and a crystallization rate of Ni 3 P in the first electroless Ni plating layer is 0% to 20% inclusive.

2. The semiconductor device according to claim 1 , wherein

the first electroless Ni plating layer has a crystallization rate of nickel (Ni) of 70% to 95% inclusive.

3. The semiconductor device according to claim 1 , wherein

the first electroless Ni plating layer is arranged on a side opposite to the first surface in the first electrode and is joined to a conductive member via a copper sintered layer.

4. The semiconductor device according to claim 1 , further comprising:

a second electrode formed on a second surface on a side opposite to the first surface of the semiconductor element, wherein

the second electrode has a stacked structure including a second electroless Ni plating layer,

the second electroless Ni plating layer contains nickel (Ni) and phosphorus (P) as a composition, and

a phosphorus (P) concentration of the second electroless Ni plating layer is 2.5 wt % to 6 wt % inclusive, and a crystallization rate of Ni 3 P in the second electroless Ni plating layer is 0% to 20% inclusive.

5. The semiconductor device according to claim 4 , wherein

the second electroless Ni plating layer has a crystallization rate of nickel (Ni) of 70% to 95% inclusive.

6. The semiconductor device according to claim 4 , wherein

the second electroless Ni plating layer is arranged on a side opposite to the second surface in the second electrode and is joined to a conductive member via a copper sintered layer.

7. The semiconductor device according to claim 4 , wherein

the stacked structure of the first electrode and the stacked structure of the second electrode are stacked structures arranged symmetrically with the semiconductor element interposed therebetween, and

a film thickness of a film forming the stacked structure of the first electrode is substantially identical to a film thickness of a film forming the stacked structure of the second electrode which is symmetric.

8. The semiconductor device according to claim 4 , wherein

the second electrode is a bonding pad to which a bonding wire is joined.

9. A power conversion apparatus comprising:

a pair of DC terminals;

AC terminals as many as the number of phases of an AC output;

switching legs as many as the number of the phases of the AC output, the switching legs connected between the pair of DC terminals such that two parallel circuits each having a switching element and a diode having a polarity opposite to a polarity of the switching element are connected in series; and

a gate circuit which controls the switching element, wherein

the switching element is the semiconductor device according to claim 1 .

10. The power conversion apparatus according to claim 9 , wherein

the first electroless Ni plating layer has a crystallization rate of nickel (Ni) of 70% to 95% inclusive.

11. The power conversion apparatus according to claim 9 , wherein

the first electroless Ni plating layer is arranged on a side opposite to the first surface in the first electrode and is joined to a conductive member via a copper sintered layer.

12. The power conversion apparatus according to claim 9 , further comprising:

a second electrode formed on a second surface on a side opposite to the first surface of the semiconductor element, wherein

the second electrode has a stacked structure including a second electroless Ni plating layer,

the second electroless Ni plating layer contains nickel (Ni) and phosphorus (P) as a composition, and

a phosphorus (P) concentration of the second electroless Ni plating layer is 2.5 wt % to 6 wt % inclusive, and a crystallization rate of Ni 3 P in the second electroless Ni plating layer is 0% to 20% inclusive.

13. The power conversion apparatus according to claim 12 , wherein

the second electroless Ni plating layer has a crystallization rate of nickel (Ni) of 70% to 95% inclusive.

14. The power conversion apparatus according to claim 12 , wherein

the second electroless Ni plating layer is arranged on a side opposite to the second surface in the second electrode and is joined to a conductive member via a copper sintered layer.

15. The power conversion apparatus according to claim 12 , wherein

the stacked structure of the first electrode and the stacked structure of the second electrode are stacked structures arranged symmetrically with the semiconductor element interposed therebetween, and

a film thickness of a film forming the stacked structure of the first electrode is substantially identical to a film thickness of a film forming the stacked structure of the second electrode which is symmetric.

16. The power conversion apparatus according to claim 12 , wherein

the second electrode is a bonding pad to which a bonding wire is joined.

Assignments (2)
CHANGE OF NAME Recorded Apr 30, 2025
From: HITACHI POWER SEMICONDUCTOR DEVICE LTD.
To: MINEBEA POWER SEMICONDUCTOR DEVICE INC.
Reel/Frame 071142/0232 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 25, 2019
From: FURUKAWA, TOMOYASU; MORITA, TOSHIAKI; KAWASE, DAISUKE; TABATA, TOSHIHITO
To: HITACHI POWER SEMICONDUCTOR DEVICE, LTD.
Reel/Frame 049573/0173 →
Priority Claims (1)
JP 2018-159171 · Aug 28, 2018 · national
Continuity (1)
Related Publication 20200075722A1 · Mar 5, 2020