Granted Patent B2

US 11,023,138 · App. 16/456,564 · Granted Jun 1, 2021

Inventors: Ariel Navon (San Jose, CA); Shay Benisty (San Jose, CA); Alexander Bazarsky (San Jose, CA)

Assignee: Western Digital Technologies, Inc.

G06F3/0611G06F3/064G06F3/0679G06F12/0253

Abstract

Claims (97)

1. A non-volatile storage system, configured to use a protocol that supports predictable latency, the non-volatile storage system comprising:

a memory array storing data in a block of memory;

a controller coupled to the memory array, wherein the controller is configured to:

in response to determining that predictable latency is enabled, operate the non-volatile storage system using a first mode for a duration of time, wherein during the first mode, the non-volatile storage system operates such that a read latency is below a read latency threshold; and

after the duration of time, operate the non-volatile storage system using a second mode for a second duration of time, wherein during the second mode: the non-volatile storage system performs a management operation based on a second set of thresholds that are different from a first set of thresholds used during the first mode;

wherein when the non-volatile storage system operates in the second mode, the controller is further configured to:

mark the block of memory as suspicious, based on a modified threshold, wherein the controller is further configured to:

compare a bit error rate of a page of memory in the non-volatile storage system to the modified threshold, wherein the modified threshold is different from a threshold used during the first mode; and

in response to determine the bit error rate is above the modified threshold, mark the block of memory including the page of memory as suspicious.

2. The non-volatile storage system of claim 1 , wherein the controller is further configured to:

determine a number of times the block of memory was marked suspicious is above a read scrub threshold; and

perform a read scrub operation on the data in the block of memory,

wherein:

the read scrub threshold corresponds to the second mode; and

the read scrub threshold is different from a second read scrub threshold associated with a different read scrub that corresponds to the first mode.

3. A non-volatile storage system, configured to use a protocol that supports predictable latency, the non-volatile storage system comprising:

a memory array storing data in a block of memory;

a controller coupled to the memory array, wherein the controller is configure to:

in response to determining that predictable latency is enabled, operate the non-volatile storage system using a first mode for a duration of time, wherein during the first mode, the non-volatile storage system operates such that a read latency is below a read latency threshold; and

after the duration of time, operate the non-volatile storage system using a second mode for a second duration of time, wherein during the second mode; the non-volatile storage system performs a management operation based on a second set of thresholds that are different from a first set of thresholds used during the first mode;

wherein when the non-volatile storage system operates in the first mode, the controller is further configured to:

receive an indication that performance of the management operation is planned;

determine a severity level of the management operation;

calculate a time remaining in the first mode; and

determine a priority value based on the severity level and the time remaining in the first mode, wherein the priority value is associated with the management operation.

4. The non-volatile storage system of claim 3 , wherein the controller is further configured to:

during operation of the non-volatile storage system in the first mode, determine that the priority value is below a default management threshold;

execute, during operation of the non-volatile storage system in the first mode, a portion of the management operation; and

execute, during operation of the non-volatile storage system in the second mode, a remaining portion of the management operation.

5. The non-volatile storage system of claim 4 , wherein the management operation is a garbage collection operation and wherein the controller is further configured to:

during the first mode, perform a partial garbage collection operation; and

during the second mode, perform another partial garbage collection operation.

6. A method for operating a memory system using a protocol that supports predictable latency, the method comprising:

in response to determining that predictable latency is enabled, operating the memory system using a first mode for a duration of time, wherein during the first mode, the memory system operates such that a read latency is below a read latency threshold;

after the duration of time, operating the memory system using a second mode for a second duration of time, wherein during the second mode: the memory system performs a management operation based on a management operation priority value; and

determining, during the first mode, the management operation priority value by:

receiving an indication that performance of the management operation is planned;

determining a severity level of the management operation;

calculating a time remaining in the first mode; and

determining the management operation priority value based on the severity level and the time remaining.

7. The method of claim 6 , further comprising:

determining, during the first mode, that the management operation priority value is below a default management threshold;

executing, during the first mode, a portion of the management operation; and

executing, during the second mode, a remaining portion of the management operation.

8. The method of claim 7 , wherein the management operation is a calibration of read thresholds and wherein the operating the memory system further comprises:

during the first mode, performing the calibration of the read thresholds using a first algorithm; and then

during the second mode, performing an additional calibration of the read thresholds using a second algorithm different from the first algorithm.

9. The method of claim 6 , wherein the operating the memory system using the second mode further comprises:

determining the priority value is above a default management threshold, wherein the management operation is calibrating a read threshold; and

calibrating the read threshold using an algorithm used to perform a complete read threshold calibration.

10. The method of claim 7 , wherein the management operation is a garbage collection operation and wherein the operating the memory system further comprises:

during the first mode, performing a partial garbage collection operation; and

during the second mode, performing another partial garbage collection operation.

11. The method of claim 6 , further comprising:

determining, during the second mode, that the priority value is below a default management threshold associated; then

determining, during the second mode, that a block of memory is suspicious, by:

comparing a bit error rate of a page of memory in the memory system to a modified threshold; in response to determining the bit error rate is above the modified threshold, wherein the modified threshold is different from a threshold used during the first mode,

marking the block of memory including the page of memory as suspicious.

12. The method of claim 11 , further comprising:

determining a number of times the block of memory was marked suspicious is above a modified read scrub threshold; and

performing a modified read scrub operation on a data in the block of memory,

wherein:

the modified read scrub threshold corresponds to the second mode, and

the modified read scrub threshold is different from a second modified read scrub threshold associated with a different read scrub that corresponds to the first mode.

13. A memory controller, comprising:

a first terminal configured to couple to a memory array,

the memory controller configured to:

in response to determining that predictable latency is enabled, operate the memory array using a first mode for a duration of time, wherein during the first mode, the memory array operates such that a read latency is below a read latency threshold;

after the duration of time, operate the memory array using a second mode for a second duration of time, wherein during the second mode, the controller performs a management operation based on a management operation priority value; and

determine, during the first mode, the management operation priority value by being further configured to:

receive an indication that performance of the management operation is planned;

determine a severity level of the management operation;

calculate time remaining in the first mode; and

determine the management operation priority value based on the severity level and the time remaining.

14. The memory controller of claim 13 , further configured to:

determine, during the first mode, that the priority value is below a default management threshold;

execute, during the first mode, a portion of the management operation; and

execute, during the second mode, a remaining portion of the management operation.

15. The memory controller of claim 14 , wherein the management operation is a calibration of read thresholds and wherein the memory controller is further configured to:

during the first mode, perform the calibration of read thresholds using a first algorithm; and then

during the second mode, perform an additional calibration of read thresholds using a second algorithm different from the first algorithm.

16. The memory controller of claim 14 , wherein the management operation is a garbage collection operation and wherein the memory controller is further configured to:

during the first mode, perform a partial garbage collection operation; and

during the second mode, perform another partial garbage collection operation.

17. A memory controller, comprising:

a first terminal configured to couple to a memory array,

the memory controller configured to:

in response to determining that predictable latency is enabled, operate the memory array using a first mode for a duration of time, wherein during the first mode, the memory array operates such that a read latency is below a read latency threshold; and

after the duration of time, operate the memory array using a second mode for a second duration of time, wherein during the second mode, the controller performs a management operation based on a management operation priority value;

determine, during the second mode, that the priority value is below a default management threshold; and then

perform, during the second mode, a modified read scrub operation, wherein the memory controller is further configured to:

compare a bit error rate of a page of memory in the memory array to a modified management operation threshold; in response to determining the bit error rate is above the modified management operation threshold,

mark a block of memory including the page of memory as suspicious;

determine a number of time the block of memory was marked suspicious is above a read scrub threshold; and

perform a read scrub operation on a data in the block of memory, wherein:

the read scrub threshold corresponds to the second mode, and

the read scrub threshold is different from a second read scrub threshold associated with a different read scrub that corresponds to the first mode.

Assignments (8)

Cited By (1)

US 12,554,413