IP Library Granted Patent US 11,600,901
Granted Patent B2
US 11,600,901 · App. 16/506,654 · Granted Mar 7, 2023

Semiconductor device package and method of manufacturing the same

Inventors: Cheng-Lin Ho (Kaohsiung, TW); Chih-Cheng Lee (Kaohsiung, TW); Chun Chen Chen (Kaohsiung, TW); Yuanhao Yu (Kaohsiung, TW)
Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
H01Q1/2283H01L23/66H01Q1/40H01Q21/0093H01L23/3128H01L2223/6677H01Q21/061
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Quick Facts
Patent No.
US 11,600,901
App. No.
16/506,654
Granted
Mar 7, 2023
Kind
B2
Abstract

A semiconductor device package includes a substrate and an antenna module. The substrate has a first surface and a second surface opposite to the first surface. The antenna module is disposed on the first surface of the substrate with a gap. The antenna module has a support and an antenna layer. The support has a first surface facing away from the substrate and a second surface facing the substrate. The antenna layer is disposed on the first surface of the support. The antenna layer has a first antenna pattern and a first dielectric layer.

Claims (12)

1. A semiconductor device package comprising:

a substrate having a first surface and a second surface opposite to the first surface; and

an antenna module disposed on the first surface of the substrate, the antenna module comprising:

a support physically separated from the substrate and having a first surface facing away from the substrate and a second surface facing the substrate;

an antenna layer disposed on the first surface of the support, the antenna layer having a first antenna pattern and a first dielectric layer;

a circuit layer including a second dielectric layer disposed on the second surface of the support, a second antenna pattern disposed on the second dielectric layer and a plurality of pads surrounded by the second dielectric layer, wherein at least one of the pads is electrically connected to the second antenna pattern, wherein the pads are physically separated from the second antenna pattern;

a conductive pillar penetrating the support and electrically connecting the first antenna layer to the pads; and

an electrical contact electrically connecting the pads to the substrate.

2. The semiconductor device package of claim 1 , wherein the antenna element further includes a dielectric layer disposed between the antenna layer and the support and a conductive via penetrating the dielectric layer and electrically connecting the antenna layer to the conductive pillar, wherein a width of the conductive via adjacent to the support is greater than a width of the conductive via far away from the support.

3. The semiconductor device package of claim 1 , wherein the antenna element includes at least two lateral surfaces recessed from lateral surfaces of the substrate.

4. The semiconductor device package of claim 1 , wherein a height of the conductive pillar is substantially the same as a thickness of the support.

5. The semiconductor device package of claim 1 , further comprising an electronic component disposed on the second surface of the substrate and electrically connected to the antenna module.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 15, 2019
From: HO, CHENG-LIN; LEE, CHIH-CHENG; CHEN, CHUN CHEN; YU, YUANHAO
To: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
Reel/Frame 050723/0420 →
Continuity (1)
Related Publication 20210013585A1 · Jan 14, 2021
Cited By (1)
US 12,224,481