Self-limiting fin spike removal
Provided is a method for forming a semiconductor structure. In embodiments of the invention, the method includes laterally forming a spacer on a side of the semiconductor structure. The method further includes performing a thermal anneal on the semiconductor structure. The method further includes performing an etch to remove materials formed by the thermal anneal.
1. A method for forming a semiconductor structure, the method comprising:
forming a fin on a substrate, the fin comprising silicon and germanium;
forming a shallow trench isolation (STI) layer over the substrate and on a sidewall of the fin;
forming a spacer comprising germanium oxide on the substrate, the spacer adjacent to the fin and in direct contact with the STI layer;
performing a thermal anneal in an oxygen free environment; and
forming a divot in the substrate by removing material formed by the thermal anneal.
2. The method of claim 1 , wherein the thermal anneal selectively oxidizes silicon in an interface between the substrate and the spacer.
3. The method of claim 2 , wherein the thermal anneal selectively oxidizes silicon according to the formula:
Si+Ge+2 GeO 2 →Ge+2 GeO+SiO 2 .
4. The method of claim 3 , wherein removing the material comprises performing an isotropic etch.
5. The method of claim 4 , wherein the isotropic etch removes silicon oxide formed at the interface between the substrate and the spacer.
6. The method of claim 5 , wherein the isotropic etch comprises a hydrofluoric acid wet etch or dry etch.
7. The method of claim 3 , wherein the thermal anneal results in a condensation of germanium at a surface of the substrate.
8. The method of claim 3 , wherein forming the divot further comprises removing condensed germanium using a water solution.
9. The method of claim 1 , wherein the divot directly contacts a base of the fin.
10. The method of claim 1 , wherein the thermal anneal is performed in an inert gas environment.
11. A method for forming a semiconductor structure, the method comprising:
forming a fin on a substrate, the fin comprising silicon and germanium;
forming a shallow trench isolation (STI) layer over the substrate and on a sidewall of the fin;
forming a mask over a first portion of the fin such that a second portion of the fin is uncovered;
removing the uncovered portion of the fin, the remaining first portion of the fin defining a fin spike;
forming a spacer comprising germanium oxide on the substrate, the spacer in direct contact with a sidewall of the fin spike;
performing a thermal anneal in an oxygen free environment; and
removing material formed by the thermal anneal.
12. The method of claim 11 , wherein the thermal anneal selectively oxidizes silicon in an interface between the fin spike and the spacer.
13. The method of claim 12 , wherein the thermal anneal selectively oxidizes silicon according to the formula:
Si+Ge+2 GeO 2 →Ge+2 GeO+SiO 2 .
14. The method of claim 13 , wherein removing the material comprises performing an isotropic etch.
15. The method of claim 14 , wherein the isotropic etch removes silicon oxide formed at the interface between the fin spike and the spacer.
16. The method of claim 15 , wherein the isotropic etch comprises a hydrofluoric acid wet etch or dry etch.
17. The method of claim 13 , wherein the thermal anneal results in a condensation of germanium in the fin spike.
18. The method of claim 17 , wherein removing material formed by the thermal anneal further comprises removing the fin spike by removing condensed germanium in the fin spike using a water solution.
19. The method of claim 11 , wherein removing the material results in forming a divot in a surface of the substrate.
20. The method of claim 11 , wherein the thermal anneal is performed in an inert gas environment.