IP Library Granted Patent US 11,145,540
Granted Patent B2
US 11,145,540 · App. 16/535,809 · Granted Oct 12, 2021

Semiconductor structure having air gap dielectric and the method of preparing the same

Inventor: Chun-Chi Lai (Taoyuan, TW)
Assignee: NANYA TECHNOLOGY CORPORATION
H01L21/7682H01L21/76877H01L23/5226H01L23/5329
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Quick Facts
Patent No.
US 11,145,540
App. No.
16/535,809
Granted
Oct 12, 2021
Kind
B2
Abstract

The present disclosure provides a semiconductor structure and a method for preparing the semiconductor structure. The semiconductor structure includes a base layer, a plurality of conductive lines, a plurality of dielectric pillars, and a sealing layer having a plurality of sealing caps. The conductive lines are disposed on the base layer. The dielectric pillars are disposed on the base layer and separated from the conductive layer. The sealing caps are disposed between the conductive lines and the dielectric pillars, wherein the sealing caps are in contact with the conductive lines and the dielectric pillars, and separated from the base layer.

Claims (25)

1. A method of preparing a semiconductor structure, comprising the steps of:

providing a base layer;

forming a plurality of conductive lines on the base layer;

after forming the plurality of conductive lines, forming a plurality of spacers on the base layer and the conductive lines, wherein each of the conductive lines are flanked by the spacers, wherein a top width of each of the spacers is less than a bottom width of each of the spacers;

forming a plurality of dielectric pillars on the base layer, between the spacers of adjacent two of the plurality of conductive lines, wherein the width of each of the plurality of dielectric pillars gradually increases as they are away from the base layer, and each of the plurality of dielectric pillars has rounding corners, wherein top widths of adjacent two of the plurality of dielectric pillars are different;

removing the spacers; and

forming a plurality of sealing caps between the conductive lines and the dielectric pillars, wherein the sealing caps are in contact with the conductive lines and the dielectric pillars, and separated from the base layer to form a plurality of air gaps correspondingly positioned between the conductive lines and the dielectric pillars, wherein a top width of each of the air gaps is less than a bottom width of each of the air gaps.

2. The method of preparing a semiconductor structure of claim 1 , further comprising the step of forming a plurality of plugs in the base layer before the step of forming the conductive lines on the base layer, wherein the conductive lines are connected to the plugs.

3. The method of preparing a semiconductor structure of claim 1 , wherein the step of forming the conductive lines on the base layer comprises

forming a conductive layer on the base layer; and

patterning the conductive layer to form the conductive lines.

4. The method of preparing a semiconductor structure of claim 1 , wherein after forming a plurality of dielectric pillars, a top end of the dielectric pillars is lower than a top end of the conductive lines, and a top portion of the spacer is exposed.

5. The method of preparing a semiconductor structure of claim 1 , wherein the spacers comprise silicon oxide.

6. The method of preparing a semiconductor structure of claim 5 , wherein the step of removing the spacers comprises etching the spacers with vapor hydrofluoric acid.

7. The method of preparing a semiconductor structure of claim 1 , wherein the step of forming the spacers comprises:

forming a spacer layer on the base layer and the conductive lines; and

partly removing of the spacer layer to form the spacers.

8. The method of preparing a semiconductor structure of claim 7 , wherein the step of forming the spacer layer comprises chemical vapor deposition.

9. The method of preparing a semiconductor structure of claim 7 , wherein partly removing the spacer layer comprises anisotropic etching.

10. The method of preparing a semiconductor structure of claim 1 , wherein the dielectric pillars comprise hydrogen silsesquioxane, cyclotene, poly(arylene ether) or silicon oxide.

11. The method of preparing a semiconductor structure of claim 1 , wherein the step of forming the dielectric pillars comprises spin-coating.

12. The method of preparing a semiconductor structure of claim 11 , wherein the step of forming the dielectric pillars comprises

filling a dielectric material between the spacers; and

drying the dielectric material to form the dielectric pillars.

13. The method of preparing a semiconductor structure of claim 1 , wherein the step of forming the sealing caps comprises spin-coating.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 15, 2019
From: LAI, CHUN-CHI
To: NANYA TECHNOLOGY CORPORATION
Reel/Frame 050061/0176 →
Continuity (1)
Related Publication 20210043498A1 · Feb 11, 2021
Cited By (1)
US 12,653,025