IP Library Granted Patent US 12,653,025
Granted Patent B2
US 12,653,025 · App. 18/150,275 · Granted Jun 9, 2026

Method of forming semiconductor structure and semiconductor structure

Inventors: Ting Li (Hefei City, CN); Hou-Hong Chou (Hefei City, CN)
Assignee: ChangXin Memory Technologies, Inc.
H10W20/46H10W20/072H10W20/074H10W20/0765H10W20/455
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,653,025
App. No.
18/150,275
Granted
Jun 9, 2026
Kind
B2
Abstract

A method of forming a semiconductor structure and a semiconductor structure are provided. The method of forming the semiconductor structure includes: providing a base, where the base includes a first dielectric layer and pads arranged at intervals in the first dielectric layer; forming a dielectric structure, where the dielectric structure exposes the pad and part of the first dielectric layer; forming an insulating structure, where the insulating structure is formed on a sidewall of the dielectric structure, the insulating structure covers a first partial sidewall of the dielectric structure, and an air gap is formed between a second partial sidewall of the dielectric structure and the insulating structure; and forming a conductive structure, where the conductive structure covers an exposed pad and an outer sidewall surface of the insulating structure.

Claims (41)

1 . A method of forming a semiconductor structure, comprising:

providing a base, wherein the base comprises a first dielectric layer and pads arranged at intervals in the first dielectric layer;

forming a dielectric structure, wherein the dielectric structure exposes the pad and part of the first dielectric layer;

forming an insulating structure, wherein the insulating structure is formed on a sidewall of the dielectric structure, the insulating structure covers a first partial sidewall of the dielectric structure, and an air gap is formed between a second partial sidewall of the dielectric structure and the insulating structure; and

forming a conductive structure, wherein the conductive structure covers an exposed pad and an outer sidewall surface of the insulating structure.

2 . The method of forming the semiconductor structure according to claim 1 , wherein the forming an insulating structure comprises:

forming a sacrificial structure, wherein the sacrificial structure covers the second partial sidewall of the dielectric structure;

forming an initial insulating structure, wherein the initial insulating structure covers the sacrificial structure, an exposed first partial sidewall of the dielectric structure, and the exposed pad;

removing the sacrificial structure to form the air gap between the initial insulating structure and the dielectric structure; and

partially removing the initial insulating structure to expose a top surface of the pad and a top surface of the dielectric structure, wherein a retained initial insulating structure forms the insulating structure.

3 . The method of forming the semiconductor structure according to claim 2 , wherein the forming a sacrificial structure comprises:

forming an initial sacrificial structure, wherein the initial sacrificial structure covers the dielectric structure and the pad; and

partially removing the initial sacrificial structure to expose the pad and part of the dielectric structure, wherein a retained initial sacrificial structure covers the second partial sidewall of the dielectric structure to form the sacrificial structure.

4 . The method of forming the semiconductor structure according to claim 2 , wherein the removing the sacrificial structure comprises:

etching to remove the sacrificial structure through reaction of oxygen-containing plasma, wherein a material of the sacrificial structure comprises carbide.

5 . The method of forming the semiconductor structure according to claim 2 , wherein before the partially removing the initial insulating structure, the method of forming the semiconductor structure further comprises:

forming an auxiliary structure, wherein the auxiliary structure covers the initial insulating structure; and

the partially removing the initial insulating structure comprises:

removing the auxiliary structure and part of the initial insulating structure to expose the top surface of the pad and the top surface of the dielectric structure.

6 . The method of forming the semiconductor structure according to claim 5 , wherein the removing the auxiliary structure and part of the initial insulating structure comprises:

etching the auxiliary structure to remove part of the auxiliary structure, so as to expose the initial insulating structure covering the pad and the initial insulating structure covering the top surface of the dielectric structure; and

etching a remaining auxiliary structure and an exposed initial insulating structure, to remove the auxiliary structure, the initial insulating structure covering the pad and the initial insulating structure covering the top surface of the dielectric structure.

7 . The method of forming the semiconductor structure according to claim 6 , wherein a material of the auxiliary structure is the same as a material of the initial insulating structure.

8 . The method of forming the semiconductor structure according to claim 1 , wherein the forming a dielectric structure comprises:

forming an isolation layer, wherein the isolation layer covers a top surface of the base;

forming a second dielectric layer, wherein the second dielectric layer covers a top surface of the isolation layer;

forming a first mask layer, wherein the first mask layer covers a partial top surface of the second dielectric layer, a projection area of the first mask layer on the base is located within an area of the first dielectric layer, and the projection area of the first mask layer on the base is smaller than the area of the first dielectric layer;

removing the second dielectric layer and the isolation layer that are exposed by the first mask layer, wherein a retained second dielectric layer and isolation layer form an initial dielectric structure; and

partially removing the initial dielectric structure, to form the dielectric structure.

9 . The method of forming the semiconductor structure according to claim 8 , wherein the partially removing the initial dielectric structure comprises:

forming a hard mask layer, wherein the hard mask layer covers the initial dielectric structure as well as the pad and part of the first dielectric layer that are exposed by the initial dielectric structure;

forming an etching stop layer, wherein the etching stop layer covers the hard mask layer;

forming a second mask layer, wherein the second mask layer covers part of the etching stop layer, and a projection area of the second mask layer on the base is located within a projection area of the initial dielectric structure on the base; and

removing the etching stop layer, the hard mask layer and part of the second dielectric layer based on the second mask layer, wherein a retained initial dielectric structure forms the dielectric structure, a retained isolation layer serves as an isolation portion of the dielectric structure, the retained second dielectric layer serves as a dielectric portion of the dielectric structure, the dielectric portion comprises a first part and a second part, projection of the first part of the dielectric portion on the first dielectric layer or projection of the isolation portion on the base, and a projection area of the second part of the dielectric portion on the first dielectric layer is located within a projection area of the first part of the dielectric portion on the first dielectric layer.

10 . The method of forming the semiconductor structure according to claim 9 , wherein

the insulating structure covers a sidewall of the first part of the dielectric portion and a partial sidewall of the second part of the dielectric portion, a first air gap is formed between the insulating structure and a sidewall of the isolation portion, and a second air gap is formed between the insulating structure and the partial sidewall of the second part of the dielectric portion.

11 . The method of forming the semiconductor structure according to claim 1 , wherein the forming a conductive structure comprises:

forming a barrier layer, wherein the barrier layer covers the insulating structure, a top surface of the dielectric structure and the exposed pad;

forming a seed layer, wherein the seed layer covers the barrier layer;

forming a conductive layer, wherein the conductive layer is grown on the seed layer; and

removing part of the conductive layer, part of the seed layer, part of the barrier layer, part of the insulating structure and part of the dielectric structure, to form the conductive structure.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 5, 2023
From: LI, TING; CHOU, HOU-HONG
To: CHANGXIN MEMORY TECHNOLOGIES, INC.
Reel/Frame 062280/0748 →
Priority Claims (1)
CN 202110984437.3 · Aug 25, 2021 · national
Continuity (2)
Continuation PCTCN2021138392 · Dec 15, 2021
Related Publication 20230163025A1 · May 25, 2023
References Cited (11)
US 6228763B1 · Lee · 2001 [cited by examiner]
US 8298911B2 · Lee · 2012 [cited by examiner]
US 11145540B2 · Lai · 2021 [cited by applicant]
US 11152374B2 · Kim et al. · 2021 [cited by applicant]
US 20140131872A1 · Lu et al. · 2014 [cited by applicant]
US 20210335655A1 · Hsueh · 2021 [cited by examiner]
CN 109994474A · 2019 [cited by applicant]
CN 110880476A · 2020 [cited by applicant]
CN 112349681A · 2021 [cited by applicant]
CN 113707602A · 2021 [cited by applicant]
International Search Report cited in PCT/CN2021/138392 mailed May 7, 2022, 10 pages. [cited by applicant]