IP Library Patent Application 16553879
Patent Application
App. No. 16/553,879

BOND ENHANCEMENT IN MICROELECTRONICS BY TRAPPING CONTAMINANTS AND ARRESTING CRACKS DURING DIRECT-BONDING PROCESSES

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Quick Facts
Patent No.
US None
App. No.
16/553,879
Filed
Aug 28, 2019
Art Unit
2893
USPC
438/115
Abstract

Structures and techniques provide bond enhancement in microelectronics by trapping contaminants and byproducts during bonding processes, and arresting cracks. Example bonding surfaces are provided with recesses, sinks, traps, or cavities to capture small particles and gaseous byproducts of bonding that would otherwise create detrimental voids between microscale surfaces being joined, and to arrest cracks. Such random voids would compromise bond integrity and electrical conductivity of interconnects being bonded. In example systems, a predesigned recess space or predesigned pattern of recesses placed in the bonding interface captures particles and gases, reducing the formation of random voids, thereby improving and protecting the bond as it forms. The recess space or pattern of recesses may be placed where particles collect on the bonding surface, through example methods of determining where mobilized particles move during bond wave propagation. A recess may be repeated in a stepped reticule pattern at the wafer level, for example, or placed by an aligner or alignment process.

Claims (26)

1 . A method, comprising:

planarizing a bonding surface of a die or a wafer to a flatness sufficient for direct bonding or for direct hybrid bonding at a bonding interface; and

providing a recess in the bonding surface before, during, or after the planarizing step, the recess configured to arrest propagation of cracking, chipping, or delamination in the bonding surface, in a bonding layer, or in a completed bond of the bonding surface.

2 . The method of claim 1 , further comprising joining the bonding surface with another bonding surface in a direct-bonding process or a direct hybrid bonding process.

3 . The method of claim 2 , further comprising providing the recess in the bonding surface at or near the location of a stress point or a stress area to arrest the cracking or chipping.

4 . The method of claim 1 , further comprising vertically aligning a first recess in a first bonding surface with a second recess in a second bonding surface across a bonding interface between the first bonding surface and the second bonding surface to arrest cracking, chipping, or delamination at the bonding interface.

5 . The method of claim 1 , further comprising at least coating the recess with a metal.

6 . The method of claim 5 , further comprising filling the recess with the metal.

7 . The method of claim 1 , wherein the recesses comprises a recessed metal pad or a metal pad with a dished surface imparted by a chemical mechanical planarization (CMP) process.

8 . The method of claim 1 , further comprising configuring the recess as a trench near the peripheral edges of the die or the wafer to arrest cracking or chipping in a dielectric bonding layer of the bonding surface.

9 . The method of claim 1 , further comprising configuring the recess as a trench near the peripheral edges of the die or the wafer to arrest a delamination process from propagating from an edge of the bonding surface toward a center of the bonding surface.

10 . The method of claim 1 , further comprising configuring the recess as a trench near a center of the bonding surface to arrest a delamination process from crossing a center line of the bonding surface.

11 . An apparatus, comprising:

a first bonding surface of a microelectronic component; and

at least one recess in the first bonding surface configured to arrest propagation of cracking, chipping, or delamination in the bonding surface, in a bonding layer, or in a completed bond of the bonding surface; and

wherein the at least one recess is nonoperational relative to circuit or electrical operational elements provided on or in the microelectronic component.

12 . The apparatus of claim 11 , further comprising a second bonding surface bonded to the first bonding surface, wherein the at least one recess arrests propagation of cracking, chipping, or delamination in the bonding interface shared by the first bonding surface and the second bonding surface.

13 . The apparatus of claim 12 , wherein the first bonding surface and the second bonding surface are direct-bonded together or direct hybrid bonded together.

14 . The apparatus of claim 12 , wherein the at least one recess in the first bonding surface is located at or near a location of a stress point or a stress area in the bonding interface to arrest the cracking, the chipping, or the delamination.

15 . The apparatus of claim 12 , further comprising at least one recess in the second bonding surface, wherein the at least one recess in the first bonding surface and the at least one recess in the second bonding surface are vertically aligned across the bonding interface to arrest the cracking, the chipping, or the delamination at the bonding interface.

16 . The apparatus of claim 11 , further comprising at least a coating of a metal in the at least one recess.

17 . The apparatus of claim 16 , further comprising the at least one recess completely filled with the metal.

18 . The apparatus of claim 11 , the at least one recess comprises a recessed metal pad or a metal pad with a dished surface imparted by a chemical mechanical planarization (CMP) process.

19 . The apparatus of claim 11 , further comprising the at least one recess configured as a trench near the peripheral edges of the first bonding surface to arrest cracking or chipping in a dielectric bonding layer of the first bonding surface.

20 . The apparatus of claim 11 , further comprising the at least one recess configured as a trench near the peripheral edges of the first bonding surface to arrest a delamination process from propagating from an edge of the first bonding surface toward a center of the first bonding surface.

21 . The apparatus of claim 11 , further comprising the at least one recess configured as a trench near a center of the first bonding surface to arrest a delamination process from crossing a center line of the first bonding surface.

Assignments (3)
CHANGE OF NAME Recorded Dec 6, 2023
From: INVENSAS BONDING TECHNOLOGIES, INC.
To: ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.
Reel/Frame 065792/0393 →
SECURITY INTEREST Recorded Jun 1, 2020
From: ROVI SOLUTIONS CORPORATION; ROVI TECHNOLOGIES CORPORATION; ROVI GUIDES, INC.; TIVO SOLUTIONS INC.; VEVEO, INC.; INVENSAS CORPORATION; INVENSAS BONDING TECHNOLOGIES, INC.; TESSERA, INC.; TESSERA ADVANCED TECHNOLOGIES, INC.; DTS, INC.; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
To: BANK OF AMERICA, N.A.
Reel/Frame 053468/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 21, 2019
From: GAO, GUILIAN; DELACRUZ, JAVIER A.; HUANG, SHAOWU; WANG, LIANG; FOUNTAIN, GAIUS GILLMAN, JR.; KATKAR, RAJESH; UZOH, CYPRIAN EMEKA
To: INVENSAS BONDING TECHNOLOGIES, INC.
Reel/Frame 051080/0867 →