IP Library Granted Patent US 11,101,540
Granted Patent B2
US 11,101,540 · App. 16/590,801 · Granted Aug 24, 2021

Semiconductor devices and methods of manufacturing semiconductor devices

Inventors: Kyoung Yeon Lee (Incheon, KR); Tae Yong Lee (Gyeonggi-do, KR); Doo Soub Shin (Incheon, KR); Seon A Lee (Incheon, KR); Woo Bin Jung (Seoul, KR); Ji Yeon Ryu (Incheon, KR); Jin Young Khim (Seoul, KR)
Assignee: Amkor Technology Singapore Holding PTE. LTD.
H01Q1/2283H01L21/4853H01L21/4857H01L21/565H01L21/568H01L21/6835H01L23/3128H01L23/49816H01L23/49822H01L23/49838H01L23/552H01L23/66H01L24/08H01L24/16H01L24/81H01L25/16H01Q1/50H01Q21/24H01L2221/68359H01L2223/6677H01L2224/08237H01L2224/16227H01L2224/80006H01L2924/19102H01L2924/3025
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Quick Facts
Patent No.
US 11,101,540
App. No.
16/590,801
Granted
Aug 24, 2021
Kind
B2
Abstract

A semiconductor device can comprise a substrate dielectric structure and a substrate conductive structure that traverses the substrate dielectric structure and comprises first and second substrate terminals; an electronic component with a component terminal coupled to the first substrate terminal; and a first antenna element with a first element terminal coupled to the second substrate terminal, a first element head side adjacent a first antenna pattern, a first element base side opposite the first element side, and a first element sidewall. The first element terminal can be exposed from the first element dielectric structure at the first element base side or at the first element sidewall. The first antenna pattern can be coupled to the substrate through the first element terminal. The substrate conductive structure can couple the first antenna element to the electronic component. Other examples and methods are also disclosed.

Claims (131)

1. A semiconductor device comprising:

a substrate comprising:

a substrate top side;

a substrate bottom side;

a substrate dielectric structure between the substrate top side and the substrate bottom side; and

a substrate conductive structure traversing the substrate dielectric structure and comprising:

a first substrate terminal; and

a second substrate terminal at the substrate top side;

an electronic component coupled to the substrate and comprising:

a component terminal coupled to the first substrate terminal; and

a first antenna element coupled to the substrate and comprising:

a first element dielectric structure;

a first antenna pattern coupled to the first element dielectric structure;

a first element terminal exposed from the first element dielectric structure;

a first element head side adjacent first antenna pattern;

a first element base side opposite the first element head side; and

a first element sidewall between the first element head side and the first element base side;

wherein:

a bottom side of the first element terminal is exposed from the first element dielectric structure at the first element base side and a lateral side of the first element terminal is exposed from the first element dielectric structure at the first element sidewall, and at least one of the bottom side of the first element terminal or the lateral side of the first element terminal is coupled to the second substrate terminal;

the first antenna pattern is coupled to the substrate through the first element terminal;

the first antenna element is coupled to the substrate outside a footprint of the electronic component; and

the substrate conductive structure couples the first antenna element to the electronic component.

2. The semiconductor device of claim 1 , wherein:

the first antenna element comprises:

a first antenna path traversing the first element dielectric structure and coupled to the first antenna pattern and the first element terminal.

3. The semiconductor device of claim 1 , wherein:

the first antenna pattern is oriented for communication along a direction substantially orthogonal to the first element head side.

4. The semiconductor device of claim 1 , wherein:

the first antenna element comprises:

the first element head side facing a vertical direction, with the first antenna pattern oriented for communication along the vertical direction;

the first element base side coupled to the substrate; and the bottom side of the first element terminal is coupled to the second substrate terminal.

5. The semiconductor device of claim 1 , wherein:

the first antenna element comprises:

the first element head side facing a first horizontal direction, with the first antenna pattern oriented for communication along the first horizontal direction;

the first element sidewall coupled to the substrate; and

the lateral side of the first element terminal is coupled to the second substrate terminal.

6. The semiconductor device of claim 1 , comprising:

a second antenna element coupled to the substrate;

wherein:

the substrate comprises, around a footprint of the electronic component:

a substrate leftward portion, a substrate rightward portion,

a substrate upward portion, and a substrate downward portion;

the first antenna element is coupled to the substrate top side at the substrate leftward portion; and

the second antenna element is coupled to the substrate top side at the substrate rightward portion.

7. The semiconductor device of claim 6 , comprising:

an encapsulant on the substrate top side;

wherein:

the second antenna element comprises a second antenna pattern adjacent a second element head side;

the second antenna element comprises a second element sidewall;

the encapsulant covers the first element sidewall and the second element sidewall; and

the encapsulant exposes the first element head side and the second element head side.

8. The semiconductor device of claim 7 , wherein:

the electronic component comprises:

a component first side coupled to the substrate top side;

a component second side opposite the component first side;

a component sidewall between the component first side and the component second side; and

a shield structure covering contacting the component second side and the component sidewall; and

the encapsulant covers the shield structure adjacent the component sidewall.

9. The semiconductor device of claim 6 , wherein:

the first antenna element comprises:

the first element head side facing a vertical direction, with the first antenna pattern oriented for communication along the vertical direction;

the first element base side coupled to the substrate; and

the bottom side of the first element terminal is coupled to the second substrate terminal, and

the second antenna element comprises:

a second element head side facing the vertical direction, with a second antenna pattern oriented for communication along the vertical direction; and

a second element base side coupled to the substrate.

10. The semiconductor device of claim 7 , wherein:

the first antenna pattern is oriented for communication top ward along a vertical direction; and

the second antenna pattern is oriented for communication bottomward along the vertical direction.

11. The semiconductor device of claim 6 , wherein:

the first antenna element comprises:

the first element head side facing a rightward direction, with the first antenna pattern oriented for communication along the rightward direction;

the first element sidewall coupled to the substrate; and

the lateral side of the first element terminal is coupled to the second substrate terminal and

the second antenna element comprises:

a second element head side facing a leftward direction opposite the rightward direction, with a second antenna pattern oriented for communication along the leftward direction; and

a second element sidewall coupled to the substrate.

12. The semiconductor device of claim 6 , wherein:

the first antenna element comprises:

the first element head side facing a vertical direction, with the first antenna pattern oriented for communication along the vertical direction; and

the first element base side coupled to the substrate; and

the second antenna element comprises:

a second element head side facing a rightward direction, with a second antenna pattern oriented for communication along the rightward direction; and

a second element sidewall coupled to the substrate.

13. The semiconductor device of claim 12 , comprising:

a third antenna element coupled to the substrate at the substrate upward portion and comprising:

a third element head side facing an upward direction, with a third antenna pattern oriented for communication along the upward direction; and

a third element sidewall coupled to the substrate.

14. The semiconductor device of claim 13 , comprising:

a fourth antenna element coupled to the substrate at the substrate downward portion and comprising:

a fourth element head side facing a downward direction, with a fourth antenna pattern oriented for communication along the downward direction; and

a fourth element sidewall coupled to the substrate.

15. The semiconductor device of claim 14 , comprising:

a fifth antenna element coupled to the substrate at the substrate leftward portion and comprising:

a fifth element head side facing a leftward direction, with a fifth antenna pattern oriented for communication along the leftward direction; and

a fifth element sidewall coupled to the substrate.

16. The semiconductor device of claim 15 , comprising:

a sixth antenna element coupled to the substrate at the substrate rightward portion and comprising:

a sixth element head side, with a sixth antenna pattern oriented for communication along the vertical direction; and

a sixth element sidewall coupled to the substrate.

17. The semiconductor device of claim 6 , wherein:

the electronic component is coupled to the substrate bottom side.

18. The semiconductor device of claim 17 , comprising:

a passive component coupled to the substrate over the electronic component.

19. The semiconductor device of claim 6 , comprising:

a passive component coupled to the substrate top side between the first antenna element and the second antenna element.

20. A method comprising:

providing a substrate comprising:

a substrate top side;

a substrate bottom side;

a substrate dielectric structure between the substrate top side and the substrate bottom side; and

a substrate conductive structure traversing the substrate dielectric structure and comprising:

a first substrate terminal; and

a second substrate terminal at the substrate top side;

coupling an electronic component to the substrate, the electronic component comprising:

a component terminal coupled to the first substrate terminal; and

coupling a first antenna element to the substrate, the first antenna element comprising:

a first element dielectric structure;

a first antenna pattern coupled to the first element dielectric structure;

a first element terminal exposed from the first element dielectric structure;

a first element head side adjacent first antenna pattern;

a first element base side opposite the first element head side; and

a first element sidewall between the first element head side and the first element base side;

wherein:

a bottom side of the first element terminal is exposed from the first element dielectric structure at the first element base side and a lateral side of the first element terminal is exposed from the first element dielectric structure at the first element sidewall, and at least one of the bottom side of the first element terminal or the lateral side of the first element terminal is coupled to the second substrate terminal;

the first antenna pattern is coupled to the substrate through the first element terminal;

the first antenna element is coupled to the substrate outside a footprint of the electronic component; and

the substrate conductive structure couples the first antenna element to the electronic component.

21. The semiconductor device of claim 6 , wherein the first antenna element is similar to the second antenna element.

22. The semiconductor device of claim 6 , wherein the first antenna pattern of the first antenna element is identical to a second antenna pattern of the second antenna element.

23. The semiconductor device of claim 6 , wherein the first antenna pattern of the first antenna element is different from a second antenna pattern of the second antenna element.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 7, 2020
From: AMKOR TECHNOLOGY KOREA, INC.
To: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE. LTD.
Reel/Frame 053717/0495 →
ASSIGNMENT AND AGREEMENT Recorded Oct 2, 2019
From: LEE, KYOUNG YEON; LEE, TAE YONG; SHIN, DOO SOUB; LEE, SEON A; JUNG, WOO BIN; RYU, JI YEON; KHIM, JIN YOUNG
To: AMKOR TECHNOLOGY KOREA, INC.,
Reel/Frame 050610/0662 →
Continuity (1)
Related Publication 20210104809A1 · Apr 8, 2021