Semiconductor device
To provide a novel semiconductor device. The semiconductor device includes cell arrays and peripheral circuits; the cell arrays include memory cells; the peripheral circuits includes a first driver circuit, a second driver circuit, a first amplifier circuit, a second amplifier circuit, a third amplifier circuit, and a fourth amplifier circuit; the first driver circuit and the second driver circuit have a function of supplying a selection signal to the cell array; the first amplifier circuit and the second amplifier circuit have a function of amplifying a potential input from the cell array; the third amplifier circuit and the fourth amplifier circuit have a function of amplifying a potential input from the first amplifier circuit or the second amplifier circuit; the first driver circuit, the second driver circuit, the first amplifier circuit, the second amplifier circuit, the third amplifier circuit, and the fourth amplifier circuit include a region overlapping with the cell array; and the memory cells include a metal oxide in a channel formation region.
1. A semiconductor device comprising:
a plurality of cell arrays; and
a plurality of peripheral circuits,
wherein the cell arrays include a plurality of memory cells,
wherein the peripheral circuits include a first driver circuit, a second driver circuit, a first amplifier circuit, a second amplifier circuit, a third amplifier circuit, and a fourth amplifier circuit,
wherein the first driver circuit and the second driver circuit have a function of supplying a selection signal to the cell array,
wherein the first amplifier circuit and the second amplifier circuit have a function of amplifying a potential input from the cell array,
wherein the third amplifier circuit and the fourth amplifier circuit have a function of amplifying a potential input from the first amplifier circuit or the second amplifier circuit,
wherein the first driver circuit, the second driver circuit, the first amplifier circuit, the second amplifier circuit, the third amplifier circuit, and the fourth amplifier circuit include a region overlapping with the cell array,
wherein the plurality of memory cells include a transistor, a capacitor, and a plug,
wherein the transistor includes an oxide semiconductor, a first insulator over the oxide semiconductor, a first conductor over the first insulator, and a second insulator in contact with a side surface of the first conductor,
wherein the first capacitor includes a third conductor over the oxide semiconductor and the second insulator, a third insulator over the third conductor, and a fourth conductor over the third insulator, and
wherein the plug is provided in contact with the oxide semiconductor and the second insulator.
2. The semiconductor device according to claim 1 ,
wherein a fourth insulator is included over the transistor,
wherein the fourth insulator includes an opening,
wherein the opening includes a region overlapping with the second insulator,
wherein the opening includes a region overlapping with the oxide semiconductor, and
wherein the third conductor is electrically connected to the oxide semiconductor in the opening.