IP Library Granted Patent US 11,101,398
Granted Patent B2
US 11,101,398 · App. 16/666,055 · Granted Aug 24, 2021

Blister-free polycrystalline silicon for solar cells

Inventors: Taiqing Qiu (Los Gatos, CA); Gilles Olav Tanguy Sylvain Poulain (Palaiseau, FR); Périne Jaffrennou (San Francisco, CA); Nada Habka (Bourg la Reine, FR); Sergej Filonovich (Orsay, FR)
Assignees: SunPower Corporation; Total Marketing Services
H01L31/0682H01L31/02008H01L31/02167H01L31/02363H01L31/022441H01L31/03682H01L31/182H01L31/1804H01L31/1824H01L31/1864H01L31/1872Y02E10/545Y02E10/547Y02P70/50
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Quick Facts
Patent No.
US 11,101,398
App. No.
16/666,055
Granted
Aug 24, 2021
Kind
B2
Abstract

Described herein are methods of fabricating solar cells. In an example, a method of fabricating a solar cell includes forming an amorphous dielectric layer on the back surface of a substrate opposite a light-receiving surface of the substrate. The method also includes forming a microcrystalline silicon layer on the amorphous dielectric layer by plasma enhanced chemical vapor deposition (PECVD). The method also includes forming an amorphous silicon layer on the microcrystalline silicon layer by PECVD. The method also includes annealing the microcrystalline silicon layer and the amorphous silicon layer to form a homogeneous polycrystalline silicon layer from the microcrystalline silicon layer and the amorphous silicon layer. The method also includes forming an emitter region from the homogeneous polycrystalline silicon layer.

Claims (44)

1. A method of fabricating a solar cell, the method comprising:

forming a first silicon layer over a first thin dielectric layer formed on a back surface of a substrate;

forming an insulating layer on the first silicon layer;

patterning the insulating layer and the first silicon layer to form first silicon regions having an insulating cap thereon and to expose portions of the substrate;

forming a second thin dielectric layer on the exposed portions of the substrate;

forming a third thin dielectric layer on the first silicon regions;

forming a second amorphous silicon layer over the second and third thin dielectric layers by PECVD, wherein the third thin dielectric layer is formed laterally directly between the first silicon regions and the second amorphous silicon layer;

heating the first silicon regions to form first polycrystalline silicon regions and heating the second amorphous silicon layer to form a second polycrystalline silicon layer; and

forming conductive contacts to the first polycrystalline silicon regions and to the second polycrystalline silicon layer.

2. The method of claim 1 , wherein forming the first silicon layer over a first thin dielectric layer comprises forming the first silicon layer by low pressure chemical vapor deposition (LPCVD).

3. The method of claim 1 , wherein forming the first silicon layer over a first thin dielectric layer comprises:

forming a first microcrystalline silicon layer on the first thin dielectric layers by PECVD; and

forming a first amorphous silicon layer on the first microcrystalline silicon layer by PECVD.

4. The method of claim 1 , wherein forming a second amorphous silicon layer over a first thin dielectric layer comprises:

forming a second microcrystalline silicon layer on the second and third thin dielectric layers by PECVD; and

forming a second amorphous silicon layer on the second microcrystalline silicon layer by PECVD.

5. The method of claim 4 , wherein forming the second microcrystalline silicon layers comprises depositing the second microcrystalline silicon by PECVD at a deposition rate approximately in the range of 10-40 nanometers per minute.

6. The method of claim 4 , wherein forming the second microcrystalline silicon layer comprises forming the second microcrystalline silicon layer to a thickness approximately in the range of 2-50 nanometers, and wherein forming the second amorphous silicon layer comprises forming the second amorphous silicon layer to a thickness approximately in the range of 50-400 nanometers.

7. The method of claim 1 , wherein the heating comprises heating at a temperature above approximately 400 degrees Celsius for a duration of approximately 10 minutes.

8. The method of claim 1 , wherein forming the second amorphous silicon layer by PECVD comprises forming a second microcrystalline silicon layer on the second thin dielectric layer and the second amorphous silicon layer on the second microcrystalline silicon layer by PECVD in a first single pass of the PECVD chamber.

9. The method of claim 1 , wherein forming the second amorphous silicon layer comprises depositing the second amorphous silicon by PECVD at a deposition rate approximately in the range of 50-400 nanometers per minute.

10. The method of claim 1 , wherein forming first silicon layer comprises forming first silicon layer having a N-type or P-type conductivity.

11. A method of fabricating a solar cell, the method comprising:

forming a first amorphous silicon layer over a first thin dielectric layer formed on a back surface of a substrate, the first amorphous silicon layer formed by plasma enhanced chemical vapor deposition (PECVD);

forming an insulating layer on the first amorphous silicon layer;

patterning the insulating layer and the first amorphous silicon layer to form first amorphous silicon regions having an insulating cap thereon and to expose portions of the substrate;

forming a second thin dielectric layer on the exposed portions of the substrate;

forming a third thin dielectric layer on the first amorphous silicon regions;

forming a second amorphous silicon layer over the second and third thin dielectric layers by PECVD, wherein the third thin dielectric layer is formed laterally directly between the first amorphous silicon regions and the second amorphous silicon layer;

heating the first amorphous silicon regions to form first polycrystalline silicon regions and heating the second amorphous silicon layer to form a second polycrystalline silicon layer, wherein the first and second polycrystalline silicon regions each comprise a blister-free polycrystalline silicon emitter region; and

forming conductive contacts to the first polycrystalline silicon regions and to the second polycrystalline silicon layer.

12. The method of claim 11 , wherein forming a first amorphous silicon layer over a first thin dielectric layer comprises:

forming a first microcrystalline silicon layer on a first thin dielectric layer formed on a back surface of a substrate, the first microcrystalline silicon layer formed by PECVD; and

forming the first amorphous silicon layer on the first microcrystalline silicon layer by PECVD.

13. The method of claim 11 , wherein forming a second amorphous silicon layer over a first thin dielectric layer comprises:

forming a second microcrystalline silicon layer on the second thin dielectric layer by PECVD; and

forming the second amorphous silicon layer on the second microcrystalline silicon layer by PECVD.

14. The method of claim 13 , wherein forming the second microcrystalline silicon layers comprises depositing microcrystalline silicon by PECVD at a deposition rate approximately in the range of 10-40 nanometers per minute.

15. The method of claim 13 , wherein forming the second amorphous silicon layer comprises depositing amorphous silicon by PECVD at a deposition rate approximately in the range of 50-400 nanometers per minute.

16. The method of claim 13 , wherein forming the second microcrystalline silicon layer comprises forming the second microcrystalline silicon layer to a thickness approximately in the range of 2-50 nanometers, and wherein forming the second amorphous silicon layer comprises forming the second amorphous silicon layer to a thickness approximately in the range of 50-400 nanometers.

17. The method of claim 13 , wherein forming the second amorphous silicon layer by PECVD comprises forming a second microcrystalline silicon layer on the first thin dielectric layer and the second amorphous silicon layer on the second microcrystalline silicon layer by PECVD in a first single pass of a PECVD chamber, and wherein forming the second amorphous silicon layer by PECVD comprises forming a second microcrystalline silicon layer on the second thin dielectric layer and the second amorphous silicon layer on the second microcrystalline silicon layer by PECVD in a second single pass of the PECVD chamber.

18. The method of claim 1 , wherein the heating comprises heating at a temperature above approximately 400 degrees Celsius for a duration of approximately 10 minutes.

19. The method of claim 11 , wherein forming a first amorphous silicon layer over a first thin dielectric layer comprises forming a N-type or P-type amorphous silicon layer over a first thin dielectric.

20. The method of claim 11 , wherein forming the first, second and third thin dielectric layers comprises forming first, second and third amorphous dielectric layers.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 8, 2025
From: TOTALENERGIES SE; TOTALENERGIES SOLAR INTL
To: MAXEON SOLAR PTE. LTD.
Reel/Frame 073059/0081 →
SECURITY INTEREST Recorded Jun 27, 2024
From: MAXEON SOLAR PTE. LTD.
To: DB TRUSTEES (HONG KONG) LIMITED
Reel/Frame 067924/0062 →
SECOND LIEN SECURITY INTEREST AGREEMENT Recorded Jun 26, 2024
From: MAXEON SOLAR PTE. LTD
To: DB TRUSTEES (HONG KONG) LIMITED
Reel/Frame 071343/0553 →
SECURITY INTEREST Recorded Jun 5, 2024
From: MAXEON SOLAR PTE. LTD.
To: DB TRUSTEES (HONG KONG) LIMITED
Reel/Frame 067637/0598 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 24, 2023
From: SUNPOWER CORPORATION
To: MAXEON SOLAR PTE. LTD.
Reel/Frame 062699/0875 →
Continuity (4)
Continuation 15419754 · Jan 30, 2017
Continuation 14747874 · Jun 23, 2015
Provisional Application 62137193 · Mar 23, 2015
Related Publication 20200066930A1 · Feb 27, 2020