IP Library Granted Patent US 11,150,839
Granted Patent B2
US 11,150,839 · App. 16/720,455 · Granted Oct 19, 2021

Host and method for interleaving data in a storage system for enhanced quality of service

Inventor: Ramanathan Muthiah (Bangalore, IN)
Assignee: Western Digital Technologies, Inc.
G06F3/0659G06F3/0619G06F3/0656G06F3/0679
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Quick Facts
Patent No.
US 11,150,839
App. No.
16/720,455
Granted
Oct 19, 2021
Kind
B2
Abstract

A host and method for interleaving data in a storage system for enhanced quality of service are provided. In one embodiment, a host is provided comprising an interface configured to communicate with a storage system comprising a memory. The processor is configured to determine a skip length for interleaving data to be stored in the storage system; interleave data according to the determined skip length; and send the interleaved data to the storage system for storage. Other embodiments are provided.

Claims (39)

1. A host comprising:

an interface configured to communicate with a storage system comprising a memory; and

a processor configured to:

determine a skip length for interleaving data to be stored in the storage system;

interleave the data according to the determined skip length;

send the interleaved data to the storage system for storage, wherein the storage system is unware that the data is interleaved;

read the interleaved data from the storage system; and

de-interleave the interleaved data.

2. The host of claim 1 , wherein the processor is further configured to determine the skip length based on a frame size of the data.

3. The host of claim 1 , wherein the processor is further configured to determine the skip length based on a size of a group of pictures (GOP) of the data.

4. The host of claim 1 , wherein the processor is further configured to determine the skip length based on an archive status of the data.

5. The host of claim 1 , wherein the processor is further configured to determine the skip length based on a threshold number of frames of a codec.

6. The host of claim 1 , wherein the processor is further configured to determine the skip length based on a history of failures.

7. The host of claim 1 , wherein the storage system comprises a three-dimensional memory.

8. The host of claim 1 , wherein the storage system is configured to be integrated in the host.

9. The host of claim 1 , wherein the storage system is configured to be removably connected with the host.

10. The host of claim 1 , wherein the skip length is configured to maintain a quality of service above a threshold level when there are errors in portions of the memory storing the interleaved data.

11. The host of claim 10 , wherein the errors comprise burst errors.

12. A method for interleaving data, the method comprising:

performing the following in a host in communication with a storage system comprising a memory:

determining how far apart to store consecutive units of data in the memory;

rearranging the data such that consecutive units of data are spaced as far apart as determined;

sending the rearranged data to the storage system for storage, wherein the storage system is unware that the data is rearranged;

reading the rearranged data from the storage system; and

restoring the rearranged data back to its original form where consecutive units of data are not spaced apart.

13. The method of claim 12 , wherein determining how far apart to store consecutive units of data in the memory is based on a frame size of the data.

14. The method of claim 12 , wherein determining how far apart to store consecutive units of data in the memory is based on a size of a group of pictures (GOP) of the data.

15. The method of claim 12 , wherein determining how far apart to store consecutive units of data in the memory is based on an archive status of the data.

16. The method of claim 12 , wherein determining how far apart to store consecutive units of data in the memory is based on a threshold number of frames of a codec.

17. The method of claim 12 , wherein determining how far apart to store consecutive units of data in the memory is based on a history of failures.

18. The method of claim 12 , wherein consecutive units of data are spaced far enough apart to maintain a quality of service above a threshold level when there are errors in portions of the memory storing the rearranged data.

19. The method of claim 18 , wherein the errors comprise burst errors.

20. A host comprising:

an interface configured to communicate with a storage system comprising a memory;

means for determining a skip length for interleaving data to be stored in the storage system;

means for interleaving the data according to the determined skip length;

means for sending the interleaved data to the storage system for storage, wherein the storage system is unware that the data is interleaved;

means for reading the interleaved data from the storage system; and

means for de-interleaving the interleaved data.

Assignments (9)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 8, 2025
From: SANDISK TECHNOLOGIES, INC.
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 070776/0307 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
RELEASE OF SECURITY INTEREST AT REEL 052025 FRAME 0088 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058965/0699 →
SECURITY INTEREST Recorded Feb 26, 2020
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 052025/0088 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 19, 2019
From: MUTHIAH, RAMANATHAN
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 051331/0896 →