Translation circuitry for an interconnection in an active interposer of a semiconductor package
Systems and method include one or more die coupled to an interposer. The interposer includes interconnection circuitry configured to electrically connect the one or more die together via the interposer. The interposer also includes translation circuitry configured to translate communications as they pass through the interposer. For instance, in the interposer, the translation circuitry translates communications, in the interposer, from a first protocol of a first die of the one or more die to a second protocol of a second die of the one or more die.
1. A system, comprising:
a plurality of die;
an active interposer coupled to the plurality of die, wherein the active interposer comprises:
interconnection circuitry configured to electrically connect the plurality of die together; and
translation circuitry comprising:
input-output translation circuitry configured to translate, in the active interposer, communications received using a first protocol from a first die of the plurality of die to a second protocol of a second die of the plurality of die; and
a voltage adaptor configured to translate, in the active interposer, the communication received using a first swing amplitude from the first die to a second swing amplitude of the second die.
2. The system of claim 1 , wherein the active interposer is coupled to the plurality of die via microbump connections.
3. The system of claim 1 , wherein the active interposer is configured to bypass the translation circuitry when the first and second protocols are a same protocol.
4. The system of claim 1 , wherein the interconnection circuitry comprises an embedded interconnect bridge that is embedded in the active interposer.
5. The system of claim 1 , wherein the first protocol and the second protocols are different versions of a protocol standard.
6. The system of claim 1 , wherein the first swing amplitude of the first protocol is higher than the second swing amplitude.
7. The system of claim 1 , wherein translating the communications from the first protocol to the second protocol comprises translating from a first frequency of the first protocol to a second frequency of the second protocol.
8. The system of claim 1 , wherein translating the communications from the first protocol to the second protocol comprises translating from a single data rate in the first protocol to a double data rate in the second protocol.
9. The system of claim 1 , wherein the first die comprises a programmable logic device, and the second die comprises a transceiver tile.
10. The system of claim 1 , wherein the first die comprises a transceiver tile, and the second die comprises a programmable logic device.
11. The system of claim 1 , wherein the first swing amplitude is associated with the first protocol and the second swing amplitude is associated with the second protocol.
12. The system of claim 2 , wherein the interconnection circuitry comprises wires coupling respective microbump connections of the plurality of die together.
13. The system of claim 5 , wherein the protocol standard comprises an advanced interface bus standard.
14. The system of claim 6 , wherein the first swing amplitude comprises a 0.9 V amplitude swing, and the second swing amplitude comprises a 0.4 V amplitude swing.
15. The system of claim 7 , wherein the first frequency is slower than the second frequency.
16. The system of claim 12 , wherein the coupling the respective microbump connections of the plurality of die together comprises coupling the respective microbumps connections via the translation circuitry.
17. A method, comprising:
receiving, at an active interposer, a communication from a first die coupled to the active interposer, wherein the communication is received from the first die in a first protocol and a first voltage swing amplitude;
translating, by an input-output translation circuitry in the active interposer, the communication from the first protocol to a second protocol a second;
translating, by a voltage adaptor in the active interposer, the communication from the first voltage swing amplitude to a second voltage swing amplitude; and
transmitting the translated communication to a second die coupled to the active interposer.
18. The method of claim 17 , wherein the first voltage swing amplitude is higher than the second voltage swing amplitude.
19. The method of claim 17 , wherein receiving the communication comprises receiving the communication in a single data rate in the first protocol, and translating the communication comprises translating the communication to a double data rate in the second protocol.
20. An interposer for a plurality of die, comprising:
interconnection circuitry configured to electrically connect the plurality of die together; and
translation circuitry configured to translate, in the interposer, communications from a first protocol of a first die of the plurality of die to a second protocol of a second die of the plurality of die, wherein the translation circuitry comprises:
swing receiver circuitry configured to receive the communications with an FPGA first swing amplitude of the first protocol;
input-output translation circuitry configured to:
receive the communications from the swing receiver circuitry; and
translate the communications to another frequency or switch between single and double data rates; and
voltage adaptor circuitry configured to:
translate the communications from the first swing amplitude to a second swing amplitude of the second protocol; and
transmit the translated communications to the second die with the second swing amplitude.